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ICS9248-150 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS9248-150 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 10 page ![]() Integrated Circuit Systems, Inc. ICS9248-150 Third party brands and names are the property of their respective owners. 9248-150 Rev B 06/12/01 Pin Configuration 48-Pin SSOP and TSSOP Recommended Application: ServerWorks Grand Champion Systems. Output Features: • 8 - Differential CPU Clock Pairs @ 3.3V • 1 - 3V 33MHz PCI clocks • 1 - 48MHz clock • 1 - Inverted 48MHz clock • 1 - 14.318 reference output Features: • Up to 200MHz frequency support • Support power management: Power Down Mode • Supports Spread Spectrum modulation: 0 to -0.5% down spread. • Uses external 14.318MHz crystal • Select logic for Differential Swing Control, Test mode, Tristate, Power down, Spread Spectrum. • External resistor for current reference • FS pins for frequency select Key Specifications: • PCI Output jitter <500ps • CPU Output jitter <200ps • 48MHz Output jitter <350ps • REF Output jitter < 1000ps Frequency Generator for Multi - Processor Servers Functionality / 3 3 1 L E S 0 0 1 0 S F1 S Fn o i t c n u F 00 0 z H M 0 0 1 e v i t c A 00 1 e d o M t s e T z H M 0 0 1 01 0 e d o M t s e T z H M 0 0 1 01 1 s t u p t u o l l a e t a t s i r T 10 0 z H M 3 3 1 e v i t c A 10 1 e d o M t s e T z H M 3 3 1 11 0 z H M 0 0 2 e v i t c A 11 1 d e v r e s e R Block Diagram PCICLK VDD48 FS0/48MHz FS1/48MHz# GND48 VDDCPU CPUCLKT0 CPUCLKC0 GNDCPU CPUCLKT1 CPUCLKC1 VDDCPU CPUCLKT2 CPUCLKC2 GNDCPU CPUCLKT3 CPUCLKC3 VDDCPU REF SPREAD# GNDREF X1 X2 VDDREF SEL100/133 GNDPCI VDDA GNDA PD# VDDCPU CPUCLKT4 CPUCLKC4 GNDCPU CPUCLKT5 CPUCLKC5 VDDCPU CPUCLKT6 CPUCLKC6 GNDCPU CPUCLKT7 CPUCLKC7 VDDCPU MULTSEL0 MULTSEL1 GND GNDI REF I REF VDDI REF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 I REF PLL2 PLL1 Spread Spectrum 48MHz PCICLK 48MHz# X1 X2 XTAL OSC CPU DIVDER PCI DIVDER PD# SPREAD# MULTSEL(1:0) SEL100/133 FS(1:0) Control Logic Config. Reg. REF 8 8 CPUCLKT (7:0) CPUCLKC (7:0) ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is Analog Power Groups VDD48, GND48 = 48MHz, PLL2 VDDA=VDD (core supply voltage 3.3V) GNDA=Ground for core supply Digital Power Group VDDREF, GNDREF = REF, Xtal |
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