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MK2014ATR Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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MK2014ATR Datasheet(HTML) 2 Page - Integrated Circuit Systems |
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2 / 4 page ![]() MK2014A Fast Ethernet Clock Source MDS 2014A B 2 Revision 121598 Printed 11/15/00 MicroClock Division of ICS • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel•(408)295-9818fax I C R O C LOC K Number Name Type Description 1 X1/ICLK XI Crystal Connection. Connect to a 14.31818 MHz crystal or clock. 2 VDD P Connect to +5V. 3 GND P Connect to ground. 4 25M O 25.000 MHz clock output. 5 GND P Connect to ground. 6 20M O 20.000 MHz clock output. 7 14M O 14.31818 MHz buffered crystal clock output. 8 X2 XO Crystal Connection to a 14.31818 MHz crystal, or leave unconnected for clock input. Pin Descriptions Key: I = Input, O = output, P = power supply connection Pin Assignment 14.3 MHz in (crystal caps not shown) Pin 1 2 3 5 6 7 0.1µF 25MHz out G V 33 Ω (optional) Suggested Layout 4 8 External Components/Crystal Selection A minimum number of external components are required for proper oscillation. A decoupling capacitor of 0.1 µF should be connected between VDD and GND on pins 2 and 3, and 33 Ω terminating resistors should be used on clock outputs with traces longer than 1 inch. For a clock input, connect to X1 and leave X2 unconnected. For a crystal input, a parallel resonant 14.31818 MHz crystal is recommended. The frequency accuracy of the crystal should be 30 ppm or better. External capacitors from each of the X1 and X2 pins to ground should be added with a value in pF equal to (CL-13)*2, where CL is the crystal load capacitance in pF. So for a crystal with load capacitance of 16 pF, 6 pF capacitors should be used. [Note that the MK2014S required crystal load capacitors of (CL-4)*2.] 33 Ω (optional) 14.3MHz out 1 8 2 3 4 7 6 5 X1/ICLK 14M GND X2 VDD 20M GND 8 pin SOIC 25M 33 Ω (optional) 20MHz out |
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