MK3713

Low Cost 3.3 Volt VCXO

MDS 3713 B

3

Revision 020900

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA •95126• (408)295-9800tel • www.icst.com

PRELIMINARY INFORMATION

Parameter

Conditions

Minimum

Typical

Maximum

Units

ABSOLUTE MAXIMUM RATINGS (note 1)

ABSOLUTE MAXIMUM RATINGS (note 1)

Supply voltage, VDD

Referenced to GND

7

V

Inputs and Clock Outputs

Referenced to GND

-0.5

VDD+0.5

V

Ambient Operating Temperature

0

70

°C

Soldering Temperature

Max of 10 seconds

260

°C

Storage temperature

-65

150

°C

DC CHARACTERISTICS (VDD = 3.3 V unless noted)

DC CHARACTERISTICS (VDD = 3.3 V unless noted)

Operating Voltage, VDD

3.15

3.30

3.45

V

Output High Voltage, VOH

IOH=-12mA

2.4

V

Output Low Voltage, VOL

IOL=12mA

0.4

V

Output High Voltage, VOH, CMOS level

IOH=-4mA

VDD-0.4

V

Input High Voltage, VIH

2

V

Input Low Voltage, VIL

0.8

V

Operating Supply Current, IDD

No Load

7

mA

Short Circuit Current

±50

mA

VIN, VCXO control voltage

0

3.3

V

AC CHARACTERISTICS (VDD = 3.3 V unless noted)

AC CHARACTERISTICS (VDD = 3.3 V unless noted)

Input Crystal Frequency

10

20

MHz

Input Crystal Accuracy

±30

ppm

Output Clock Rise Time

0.8 to 2.0V

1.5

ns

Output Clock Fall Time

2.0 to 0.8V

1.5

ns

Output Clock Duty Cycle

At VDD/2

40

50

60

%

Output Clock Pullability, note 2

0V

≤ VIN ≤ 3.3 V

±100

ppm

Electrical Specifications

Notes:

1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged

exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.

2. With a ICS/MicroClock approved pullable crystal.

External Components

The MK3713 requires a minimum number of external components for proper operation. A decoupling

capacitor of 0.01µF should be connected between VDD and GND on pins 2 and 4, as close to the

MK3713 as possible. A series termination resistor of 33

Ω may be used for the clock output. The input

crystal must be connected as close to the chip as possible. The input crystal should be a parallel mode,

pullable, AT cut, 13.5 MHz, with 14 pF load capacitance. Consult ICS for recommended suppliers.

IMPORTANT - read application note MAN05 before laying out the PCB.