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ADF4207 Datasheet(PDF) 17 Page - Analog Devices |
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ADF4207 Datasheet(HTML) 17 Page - Analog Devices |
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17 / 20 page ![]() REV. 0 ADF4206/ADF4207/ADF4208 –17– RF SECTION (RF1) Programmable RF1 Reference (R) Counter If control bits (C2, C1) are (1, 0), the data is transferred from the input shift register to the 14 Bit RF1 R counter. Table V shows the input shift register data format for the RF1 R counter and the divide ratios possible. RF1 Phase Detector Polarity P9 sets the RF1 Phase Detector Polarity. When the RF1 VCO characteristics are positive this should be set to “1.” When they are negative it should be set to “0.” See Table V. RF1 Charge Pump Three-State P10 puts the RF1 charge pump into three-state mode when programmed to a “1.” It should be set to “0” for normal opera- tion. See Table V. RF1 Program Modes Table III and Table V show how to set up the Program Modes in the ADF420x family. RF1 Charge Pump Currents Replaced with a P13 programs the current setting for the RF1 charge pump. See Table V. Programmable RF1 AB Counter If control bits (C2, C1) are (1, 1), then the data in the input register is used to program the RF1 AB counter. The AB counter consists of a 6-bit swallow counter (A counter) and 11-bit programmable counter (B counter). Table VI shows the input register data format for programming the RF1 AB counter and the divide ratios possible. See Table VI. RF1 Prescaler Value P14 in the RF1 A, B counter latch set the RF1 prescaler value. See Table VI. RF1 Power-Down Setting P16 in the RF1 AB counter high powers down RF1 side. RF Fastlock The fastlock feature can improve the lock time of the PLL. It increases charge pump current to a maximum for a period of time. Fastlock of the ADF420x family is activated by setting P13 in the reference counter high and setting the fastlock switch on using MUXOUT. Switching in an external resistor using MUXOUT compensates the loop dynamics for the effect of increasing charge pump current. Setting P13 low removes the PLL from fastlock mode. OSC OUT MUXOUT ADF4207 V P2 V DD2 VDD1VP1 CP RF1 RF2IN RF1IN OSC IN CLK DATA LE DECOUPLING CAPACITORS (22 F/10pF) ON VDD, VP OF THE ADF4207, AND ON VCC OF THE VCOs HAVE BEEN OMITTED FROM THE DIAGRAM TO AID CLARITY. VCO190-125T V CC CP RF2 V CC 100pF 18 18 18 100pF IF OUT 100pF 51 30pF 10MHz 18k 1.3nF 13nF 2.7k 620pF 3.3k V P V DD V P 100pF 18 RF OUT 100pF 18 18 100pF 51 LOCK DETECT 30pF VCO190-1068U Figure 7. GSM Handset Receiver Local Oscillator Using the ADF4207 OBSOLETE |
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