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ILC1832M Datasheet(PDF) 2 Page - Impala Linear Corporation |
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ILC1832M Datasheet(HTML) 2 Page - Impala Linear Corporation |
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2 / 5 page ![]() Parameter Symbol Ratings Units VCC -0.3 to 7.0 V Terminal Voltage All other inputs -0.3 to (VCC + 0.3) V VCC 250 mA Input Current GND All other inputs 25 mA Operating Temperature Range TA -40 to +85 °C Storage Temperature Range -65 to +150 °C Lead Temperature (Soldering, 10 sec.) 300 °C Power Dissipation 700 mW Parameter Conditions Min Typ Max Units Supply Voltage Range, VCC 5.5 V Supply Current, ICC VCC = 5V (See Note 1) VCC = 3.3V (See Note 1) 18 15 30 25 µA ST and PBRST Input Levels VIH, VCC > 2.7V VIH, VCC < 2.7V VIL 2.0 VCC –0.4 -0.3 VCC + 0.3 VCC + 0.3 0.5 V Input Leakage PBRST, IIL (See Note 2) ±1 µA Output Voltage, RST, RST ISOURCE = 350µA, VCC = 3.3V 2.4 V Output Voltage, RST, RST ISINK = 10mA, VCC = 3.3V 0.4 V Output Voltage, RST ISINK = 50µA, VCC = 1.4V 0.3 V VCC 5% Trip Point (Reset Threshold Voltage) TOL= GND 2.80 2.88 2.97 V VCC 10% Trip Point (Reset Threshold Voltage) TOL= VCC 2.47 2.55 2.64 V Input Capacitance, ST, TOL CIN (See Note 3) 5 pF Output Capacitance, RST, RST COUT (See Note 3) 7 pF PBRST Min. Pulse Width, tPB PBRST = VIL (See note 4) 20 ms PBRST Delay, tPBD 1 4 20 ms Reset Active Time, tRST 250 610 1000 ms ST Pulse Width, tST 20 ns ST Timeout Period, tTD TD = 0V TD = Open TD = VCC 62.5 250 500 150 600 120 0 250 1000 2000 ms VCC Fall Time, tF 40 µs VCC Rise Time, tR 0 ns VCC Detect to RST Low and RST High, tRPD VCC Falling at 1.66 mV/ µs 5 8 µs VCC Detect to RST Open and RST Low, tRPU VCC Rising 250 610 1000 ms VCC = 3 to 5.5V, TA = Operating Temperature Range, unless otherwise noted. Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed. Note 1: ICC is measured with PBRST and all outputs open and inputs within 0.5V of supply rails. Note 2: PBRST has an internal 40k Ω (typical) pull-up resistor to V CC. Note 3: Guaranteed by design at TA = 25°C. Note 4: PBRST must be held low for a minimum of 20ms to guarantee a reset. µP Supervisory Circuit Preliminary Impala Linear Corporation 2 (408) 574-3939 www.impalalinear.com October 1999 ILC1832 1.1 Electrical Characteristics Absolute Maximum Ratings |
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