USB Dual Control Switches

Impala Linear Corporation

5

(408) 574-3939

www.impalalinear.com

Dec 2000

ILC75267536 1.5

Preliminary

Undervoltage Lockout

UVLO (undervoltage lockout) prevents the output MOS-

In the undervoltage state, the FLAG will be low. After the

switch turns on, if the voltage drops below approximately

2.3V, UVLO shuts off the output MOSFET and signals fault

flag. Undervoltage detection functions only when at least

one switch is enabled.

Current Sensing and Limiting

The current-limit threshold is preset internally. The pre-

set level prevents damage to the output MOSFET and

external load but allows a minimum current of 0.5A

through the output MOSFET of each channel. The cur-

rent-limit circuit senses a portion of the output FET

switch current. The reaction to an overcurrent condition

varies with three scenarios:

Switch Enabled into Short Circuit

If a switch is powered on or enabled into a heavy load or

short circuit, the switch immediately goes into a constant-

current mode, reducing the output voltage. The fault flag

goes low until the load is reduced.

Short Circuit Applied to Output

When a heavy load is applied, a large transient current may

flow until the current limit circuitry will respond. Once this

occurs, the device limits current to less than the short-circuit

current limit specification.

Current-Limit Response

The ILC7526 current-limit profile exhibits a small foldback

effect of approximately 500mA.

Once this current-limit

threshold is exceeded the device enters constant-current

mode. This constant current is specified as the short circuit

current limit in the “Electrical Characteristics” table. it is

important to note that the device will deliver load current up

to the current-limit threshold which is typically 1.6A

Fault Flag

FLG is an N-channel, open-drain MOSFET output. The fault-

flag is active (low) for one or more of the following conditions:

shutdown. The flag output MOSFET is capable of sinking a

10mA load to typically 100mV above ground. Multiple FLG

pins may be wired “NORed” to a common pull-up resistor.

Enable Input

EN must be driven logic high or logic low for a clearly

defined input.

Floating the input may cause unpre-

dictable operation. EN should not be allowed to go neg-

ative with respect to GND.

Soft-Start

The ILC7526 presents a high impedance when off, and

slowly becomes a low impedance as it turns on.

This

reduces in rush current and related voltage drop that

results from charging a capacitive load, satisfying the USB

voltage drop requirements for bus-powered applications.

ILC7526

ENA

FLGA

FLGB

ENB

OUTA

IN

GND

OutB

0.1µF to 1µF

3.0V to 5.5V

Supply Filtering

A 0.1µF to 1µF bypass capacitor from IN to GND, located at

the device, is strongly recommended to control supply tran-

sients. Without a bypass capacitor, an output short may

cause sufficient ringing on the input (from supply lead induc-

tance) to damage internal control circuitry. Input or output

transients must not exceed the absolute maximum output