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83C196EA Datasheet(PDF) 13 Page - Intel Corporation |
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83C196EA Datasheet(HTML) 13 Page - Intel Corporation |
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13 / 40 page ![]() ADVANCE INFORMATION 9 83C196EA CHMOS 16-BIT MICROCONTROLLER — AUTOMOTIVE EPORT.7:0 I/O Extended Addressing Port This is a standard 8-bit, bidirectional port. EPORT.4:0 share package pins with A20:16. EPORT7:5 share package pins with CS2:0#. EXTINT I External Interrupt In normal operating mode, a rising edge on EXTINT sets the EXTINT interrupt pending bit. EXTINT is sampled during phase 2 (CLKOUT high). The minimum high time is one state time. In powerdown mode, asserting the EXTINT signal for at least 50 ns causes the device to resume normal operation. The interrupt need not be enabled, but the pin must be configured as a special-function input. If the EXTINT interrupt is enabled, the CPU executes the interrupt service routine. Otherwise, the CPU executes the instruction that immediately follows the command that invoked the power-saving mode. In idle mode, asserting any enabled interrupt causes the device to resume normal operation. EXTINT shares a package pin with P2.2. INST O Instruction Fetch This active-high output signal is valid only during external memory bus cycles. When high, INST indicates that an instruction is being fetched from external memory. The signal remains high during the entire bus cycle of an external instruction fetch. INST is low for data accesses, including interrupt vector fetches and chip configuration byte reads. INST is low during internal memory fetches. INST shares a package pin with P5.1. NMI I Nonmaskable Interrupt In normal operating mode, a rising edge on NMI generates a nonmaskable interrupt. NMI has the highest priority of all prioritized interrupts. Assert NMI for greater than one state time to guarantee that it is recognized. ONCE# I On-circuit Emulation Holding ONCE# low during the rising edge of RESET# places the device into on-circuit emulation (ONCE) mode. This mode puts all pins into a high- impedance state, thereby isolating the device from other components in the system. The value of ONCE# is latched when the RESET# pin goes inactive. While the device is in ONCE mode, you can debug the system using a clip-on emulator. To exit ONCE mode, reset the device by pulling the RESET# signal low. To prevent inadvertent entry into ONCE mode, either configure this pin as an output or hold it high during reset and ensure that your system meets the V IH specification. ONCE# shares a package pin with P2.6. OS7:0 O Event Processor Array (EPA) Compare-only Channels with Simulcapture Outputs of the EPA’s compare-only channels. These pins are multiplexed with port 9 and may be configured as standard I/O. OS7:0 share package pins with P9.7:0. Table 4. Signal Descriptions (Continued) Name Type Description |
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