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ACTS541MS Datasheet(PDF) 1 Page - Intersil Corporation |
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ACTS541MS Datasheet(HTML) 1 Page - Intersil Corporation |
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1 / 3 page  1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 ACTS541MS Radiation Hardened Octal Three-State Buffer/Line Driver Pinouts 20 LEAD CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T20, LEAD FINISH C TOP VIEW 20 LEAD CERAMIC FLATPACK MIL-STD-1835 DESIGNATOR, CDFP4-F20, LEAD FINISH C TOP VIEW 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 OE1 A0 A1 A2 A3 A4 A6 A5 A7 GND VCC Y0 Y1 Y2 OE2 Y3 Y4 Y5 Y6 Y7 2 3 4 5 6 7 8 120 19 18 17 16 15 14 13 OE1 A0 A1 A2 A3 A4 A5 A6 9 10 12 11 A7 GND VCC Y0 Y1 Y2 OE2 Y3 Y4 Y5 Y6 Y7 Features • Devices QML Qualified in Accordance with MIL-PRF-38535 • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96726 and Intersil’s QM Plan • 1.25 Micron Radiation Hardened SOS CMOS • Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si) • Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day (Typ) • SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg • Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse • Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse • Latch-Up Free Under Any Conditions • Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC • Significant Power Reduction Compared to ALSTTL Logic • DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V • Input Logic Levels - VIL = 0.8V Max - VIH = VCC/2 Min • Input Current ≤ 1µA at VOL, VOH • Fast Propagation Delay . . . . . . . . . . . . . . . . 21ns (Max), 14ns (Typ) Description The Intersil ACTS541MS is a Radiation Hardened Octal Buffer/Line Driver, with three-state outputs. The output enable pins OE1, OE2 control the three-state outputs. If either enable is high the output will be in a high impedance state. For data output both enables must be low. The ACTS541MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of a radiation hardened, high-speed, CMOS/SOS Logic family. The ACTS541MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a Ceramic Dual-In-Line package (D suffix). January 1996 Ordering Information PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE 5962F9672601VRC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead SBDIP 5962F9672601VXC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead Ceramic Flatpack ACTS541D/Sample 25oC Sample 20 Lead SBDIP ACTS541K/Sample 25oC Sample 20 Lead Ceramic Flatpack ACTS541HMSR 25oC Die Die Spec Number 518891 File Number 4094 |
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