CDP1824CD datasheet(4/6 Pages) INTERSIL

4 / 6 page

6-40

Dynamic Electrical Speciﬁcations at TA = -40oC to +85oC, VDD ±5%, Input tR, tF = 10ns, CL = 50pF, RL = 200kΩ; See Figure 2

PARAMETER

SYMBOL

TEST

CONDITIONS

LIMITS

UNITS

CDP1824D, CDP1824E

CDP1824CD, CDP1824CE

VDD (V)

(NOTE 1)

MIN

(NOTE 2)

TYP

MAX

(NOTE 1)

MIN

(NOTE 2)

TYP

MAX

WRITE OPERATION

Write Pulse Width

tWRW

390

200

390

200

180

150

Data Setup Time

tDS

390

100

390

100

180

Data Hold Time

tDH

Chip Select Setup Time

tCS

425

210

425

210

215

110

Address Setup Time

tAS

640

500

640

500

390

300

NOTES:

1. Time required by a limit device to allow for the indicated function.

2. Time required by a typical device to allow for the indicated function. Typical values are for TA = +25

oC and nominal V

DD.

FIGURE 2. WRITE CYCLE TIMING DIAGRAM

NOTE: tR, tF > 1µs.

FIGURE 3. LOW VDD DATA RETENTION WAVEFORMS AND TIMING DIAGRAM

tAS

tCS

tWRW

tDS

tDH

MWR

BUS

DATA RETENTION

MODE

0.95 VDD

VDR

(NOTE 1)

VDD

tCDR

VIH

VIL

VIH

VIL

tRC

CDP1824, CDP1824C

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