4-74

FIGURE 3. CDP1871A DYNAMIC TIMING DIAGRAM (NON-REPEAT)

FIGURE 4. FIGURE 4. CDP1871A DYNAMIC TIMING DIAGRAM (REPEAT)

TPB

KEY

CLOSURE

DA

RPT

DEBOUNCE

D1-D11

CS

(NOTE)

BUS0-BUS7

PRESENT COUNT

VALID

NEXT COUNT

OPEN

CLOSED

NOTE: CS = CS1

• CS2 • CS3 • CS4

CS1, CS2, CS3 = (CPU N-LINES)

CS4 (MRD) is High for CPU Input Instruction

TPB

KEY

DEPRESSED

DA

RPT

DEBOUNCE

D1-D11

CS

(NOTE)

BUS0-BUS7

PRESENT COUNT

VALID

NEXT COUNT

OPEN

CLOSED

NOTE: CS = CS1

• CS2 • CS3 • CS4

CS1, CS2, CS3 = (CPU N-LINES)

CS4 (MRD) is High for CPU Input Instruction

CDP1871A, CDP1871AC