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UPC1862 Datasheet(PDF) 21 Page - NEC |
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UPC1862 Datasheet(HTML) 21 Page - NEC |
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21 / 32 page  21 µPC1862 Parameter Symbol Condition MIN. TYP. MAX. Unit Field ident. output EFIOH1 High level of synchronized Field ident. output 2.7 3.8 - V High level (1) when only 0.3 Vp-p sync signal is input to pin 36 IOH = –400 µA Field ident. output EFIOH2 High level of synchronized Field ident. output 3.5 4.3 - V High level (2) when only 0.3 Vp-p sync signal is input to pin 36 IOH = –20 µA Field idnet. output EFIOL High level of synchronized Field ident. output - 0.1 0.4 V Low level when only 0.3 Vp-p sync signal is input to pin 36 IOL = +2 mA H detection output EFIOH1 High level of asynchronized H detect output 2.7 3.8 - V High level (1) without H sync input IOH = –400 µA H detection output EFIOH2 High level of asynchronized H detect output 3.5 4.3 - V High level (2) without H sync input IOH = –20 µA H detection output EFIOL High level of synchronized H detect output - 0.1 0.4 V Low level when only 0.3 Vp-p sync signal is input to pin 36 IOL= +2 mA H sync lock-in range fHP Frequency range that can be pulled when only ±400 ±500 - Hz 0.3 Vp-p sync signal is input to pin 36 and H sync frequency is varied (fSC conversion) Horizontal VCO control βH Rate of variation of frequency when APC filter –1.6 –1.3 –0.9 Hz/mV sensitivity pin is changed form 3.0 V to 3.4 V without H sync input (fSC conversion) Horizontal VCO free-run fHO Frequency difference of HD output from fH –100 –25 +50 Hz frequency when H sync input is not applied Pulse width of HD output PWNHSO Pulse width of synchronized HD output when 3.8 4.0 4.2 µs only 0.3 Vp-p sync signal is input to pin 36 Pulse width of VD output PWVSO1 Pulse width of synchronized VD ODD - 6.0 - HNote PWVSO2 output when only 0.3 Vp-p sync EVEN - 5.5 - HNote signal is input to pin 36 Pulse width of Clamp output PWCPO Pulse width of synchronized Clamp output when 3.4 3.6 3.8 µs only 0.3 Vp-p sync signal is input to pin 36 Oscillation start voltage of VST Output voltage at HD when VCC is gradually - - 4.2 V horizontal VCO increased from 0 V without H sync input H killer output Low level EHKOL Low level of synchronized H killer output when - - 0.4 V only 0.3 Vp-p sync signal is input to pin 36 Change value of Chroma output Burst gate input VBGPE1 Burst gate pulse input voltage when Clamp 1.6 1.9 2.0 V Threshold level 1 voltage begins Low level is gradually increased from 0 V without signal input Note H: Horizontal scanning period |
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