ADE7757_15 datasheet(3/16 Pages) AD

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REV. A

ADE7757

–3–

TIMING CHARACTERISTICS1, 2

Parameter

A, B Versions

Unit

Test Conditions/Comments

244

F1 and F2 Pulse Width (Logic Low).

See Table II

sec

Output Pulse Period. See Transfer Function section.

1/2 t2

sec

Time between F1 Falling Edge and F2 Falling Edge.

3, 4

173

CF Pulse Width (Logic High).

See Table III

sec

CF Pulse Period. See Transfer Function section.

µs

Minimum Time between F1 and F2 Pulses.

NOTES

1Sample tested during initial release and after any redesign or process change that may affect this parameter.

2See Figure 1.

3The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See Frequency Outputs section.

4The CF pulse is always 35

µs in the high frequency mode. See Frequency Outputs section and Table III.

Specifications subject to change without notice.

(VDD = 5 V

5%, AGND = DGND = 0 V, On-Chip Reference, RCLKIN = 6.2 k

Ω,

0.5%

50 ppm/ C, TMIN to TMAX = –40 C to +85 C, unless otherwise noted.)

Figure 1. Timing Diagram for Frequency Outputs

ADE7757 Datasheet(PDF) 3 Page - Analog Devices