HIP4081IP datasheet(12/18 Pages) INTERSIL

12 / 18 page

HI4081 Power-up Application Information

The HIP4081 H-Bridge Driver IC requires external circuitry

to assure reliable start-up conditions of the upper drivers. If

not addressed in the application, the H-bridge power MOS-

FETs may be exposed to shoot-through current, possibly

leading to MOSFET failure. Following the instructions below

will result in reliable start-up.

The HIP4081 has four inputs, one for each output. Outputs

ALO and BLO are directly controlled by input ALI and BLI.

By holding ALI and BLI low during start-up no shoot-through

conditions can occur. To set the latches to the upper drivers

such that the driver outputs, AHO and BHO, are off, the DIS

pin must be toggled from low to high after power is applied.

This is accomplished with a simple resistor divider, as shown

below in Figure 30. As the VDD/VCC supply ramps from zero

up, the DIS voltage is below its input threshold of 1.7V due

to the R1/R2 resistor divider. When VDD/VCC exceeds

approximately 9V to 10V, DIS becomes greater than the

input threshold and the chip disables all outputs. It is critical

that ALI and BLI be held low prior to DIS reaching its thresh-

old level of 1.7V while VDD/VCC is ramping up, so that shoot

through is avoided. After power is up the chip can be

enabled by the ENABLE signal which pulls the DIS pin low.

FIGURE 28. HIGH VOLTAGE LEVEL-SHIFT CURRENT vs

FREQUENCY AND BUS VOLTAGE

FIGURE 29. MINIMUM DEAD-TIME vs DEL RESISTANCE

Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V,

RHDEL = RLDEL = 100K and TA = 25

oC, Unless Otherwise Speciﬁed (Continued)

100

1000

200

500

100

1000

200

500

SWITCHING FREQUENCY (kHz)

60V

40V

80V

20V

100

150

200

250

120

150

HDEL/LDEL RESISTANCE (k

Ω)

1 BHB

BHI

DIS

VSS

BLI

ALI

HDEL

AHI

LDEL

AHB

BHO

BLO

BLS

VDD

BHS

VCC

ALS

ALO

AHS

AHO

3.3K

ENABLE

15K

FIGURE 30A.

VDD

DIS

ALI, BLI

8.5V TO 10.5V (ASSUMES 5% RESISTORS)

1.7V

12V, FINAL VALUE

NOTES:

2. ALI and/or BLI may be high after t1, whereupon the ENABLE pin

may also be brought high.

3. Another product, HIP4081A, incorporates undervoltage circuitry

which eliminates the need for the above power up circuitry.

FIGURE 30B. TIMING DIAGRAM FOR FIGURE 30A

HIP4081

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