HIP6012CB datasheet(5/10 Pages) INTERSIL

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PGND (Pin 11)

This is the power ground connection. Tie the lower MOSFET

source to this pin.

LGATE (Pin 12)

Connect LGATE to the lower MOSFET gate. This pin

provides the gate drive for the lower MOSFET.

PVCC (Pin 13)

Provide a bias supply for the lower gate drive to this pin.

VCC (Pin 14)

Provide a 12V bias supply for the chip to this pin.

Functional Description

Initialization

The HIP6012 automatically initializes upon receipt of power.

Special sequencing of the input supplies is not necessary.

The Power-On Reset (POR) function continually monitors

the input supply voltages and the enable (EN) pin. The POR

monitors the bias voltage at the VCC pin and the input

voltage (VIN) on the OCSET pin. The level on OCSET is

equal to VIN Less a ﬁxed voltage drop (see over-current

protection). With the EN pin held to VCC, the POR function

initiates soft start operation after both input supply voltages

exceed their POR thresholds. For operation with a single

+12V power source, VIN and VCC are equivalent and the

+12V power source must exceed the rising VCC threshold

before POR initiates operation.

The Power-On Reset (POR) function inhibits operation with

the chip disabled (EN pin low). With both input supplies

above their POR thresholds, transitioning the EN pin high

initiates a soft start interval.

Soft Start

The POR function initiates the soft start sequence. An internal

µA current source charges an external capacitor (CSS) on

the SS pin to 4V. Soft start clamps the error amplifier output

(COMP pin) and reference input (+ terminal of error amp) to

the SS pin voltage. Figure 3 shows the soft start interval with

CSS = 0.1µF. Initially the clamp on the error amplifier (COMP

pin) controls the converter’s output voltage. At t1 in Figure 3,

the SS voltage reaches the valley of the oscillator’s triangle

wave. The oscillator’s triangular waveform is compared to the

ramping error amplifier voltage. This generates PHASE

pulses of increasing width that charge the output capacitor(s).

This interval of increasing pulse width continues to t2. With

sufficient output voltage, the clamp on the reference input

controls the output voltage. This is the interval between t2 and

t3 in Figure 3. At t3 the SS voltage exceeds the reference

voltage and the output voltage is in regulation. This method

provides a rapid and controlled output voltage rise.

Over-Current Protection

The over-current function protects the converter from a

shorted output by using the upper MOSFETs on-resistance,

rDS(ON) to monitor the current. This method enhances the

converter’s efﬁciency and reduces cost by eliminating a

current sensing resistor.

The over-current function cycles the soft-start function in a

hiccup mode to provide fault protection. A resistor (ROCSET)

programs the over-current trip level. An internal 200

µA

(typical) current sink develops a voltage across ROCSET that

is reference to VIN. When the voltage across the upper

MOSFET (also referenced to VIN) exceeds the voltage

across ROCSET, the over-current function initiates a soft-

start sequence. The soft-start function discharges CSS with

a 10

µA current sink and inhibits PWM operation. The soft-

start function recharges CSS, and PWM operation resumes

with the error ampliﬁer clamped to the SS voltage. Should an

overload occur while recharging CSS, the soft start function

inhibits PWM operation while fully charging CSS to 4V to

complete its cycle. Figure 4 shows this operation with an

TIME (5ms/DIV)

SOFT-START

(1V/DIV)

OUTPUT

(1V/DIV)

VOLTAGE

FIGURE 3. SOFT-START INTERVAL

TIME (20ms/DIV)

10A

15A

FIGURE 4. OVER-CURRENT OPERATION

HIP6012

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