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HIP6501 Datasheet(PDF) 1 Page - Intersil Corporation

Part # HIP6501
Description  Triple Linear Power Controller with ACPI Control Interface
PDF  14 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP6501 Datasheet(HTML) 1 Page - Intersil Corporation

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File Number
4749.2
HIP6501A
Triple Linear Power Controller with ACPI
Control Interface
The HIP6501A, paired with either the HIP6020 or HIP6021,
simplifies the implementation of ACPI-compliant designs in
microprocessor and computer applications. The IC
integrates two linear controllers and a low-current pass
transistor, as well as the monitoring and control functions
into a 16-pin SOIC package. One linear controller generates
the 3.3VDUAL voltage plane from an ATX power supply’s
5VSB output during sleep states (S3, S4/S5), powering the
PCI slots through an external pass transistor, as instructed
by the status of the 3.3VDUAL enable pin. An additional pass
transistor is used to switch in the ATX 3.3V output for PCI
operation during S0 and S1 (active) operatingstates. The
second linear controller supplies the computer system’s
2.5V/3.3V memory power through an external pass
transistor in active states. During S3 state, an integrated
pass transistor supplies the 2.5V/3.3V sleep-state power. A
third controller powers up a 5VDUAL plane by switching in
the ATX 5V output in active states, or the ATX 5VSB in sleep
states.
The HIP6501A’s operating mode (active-state outputs or
sleep-state outputs) is selectable through two control pins:
S3 and S5. Further control of the logic governing activation
of different power modes is offered through two enabling
pins: EN3VDL and EN5VDL. In active states, the 3.3VDUAL
linear regulator uses an external N-Channel pass MOSFET
to connect the output (VOUT1) directly to the 3.3V input
supplied by an ATX (or equivalent) power supply, while
incurring minimal losses. In sleep state, the 3.3VDUAL output
is supplied from the ATX 5VSB through an NPN transistor,
also external to the controller. Active state power delivery for
the 2.5/3.3VMEM output is done through an external NPN
transistor, or an NMOS switch for the 3.3V setting. In sleep
states, conduction on this output is transferred to an internal
pass transistor. The 5VDUAL output is powered through two
external MOS transistors. In sleep states, a PMOS (or PNP)
transistor conducts the current from the ATX 5VSB output,
while in active states, current flow is transferred to an NMOS
transistor connected to the ATX 5V output. Similar to the
3.3VDUAL output, the operation of the 5VDUAL output is
dictated not only by the status of the S3 and S5 pins, but that
of the EN5VDL pin as well.
Features
• Provides 3 ACPI-Controlled Voltages
- 5V Active/Sleep (5VDUAL)
- 3.3V Active/Sleep (3.3VDUAL)
- 2.5V/3.3V Active/Sleep (2.5VMEM)
• Simple Control Design - No Compensation Required
• Excellent Output Voltage Regulation
- 3.3VDUAL Output: ±2.0% Over Temperature; Sleep
States Only
- 2.5V/3.3V Output:
±2.0% Over Temperature; Both
Operational States (3.3V setting in sleep only)
• Fixed Output Voltages Require No Precision External
Resistors
• Small Size
- Small External Component Count
• Selectable 2.5VMEM Output Voltage Via FAULT/MSEL Pin
- 2.5V for RDRAM Memory
- 3.3V for SDRAM Memory
• Under-Voltage Monitoring of All Outputs with Centralized
FAULT Reporting
• Adjustable Soft-Start Function Eliminates 5VSB
Perturbations
Pinout
HIP6501A (SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
HIP6501ACB
0 to 70
16 Ld SOIC
M16.15
HIP6501EVAL1
Evaluation Board
10
11
12
13
14
15
16
7
6
5
4
3
2
1
EN3VDL
3V3DLSB
S3
3V3DL
EN5VDL
5VSB
VSEN2
12V
DLA
SS
FAULT/MSEL
5VDL
S5
DRV2
GND
5VDLSB
9
8
Data Sheet
February 2000
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000


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