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ISL6569CBZ Datasheet(PDF) 16 Page - Intersil Corporation |
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ISL6569CBZ Datasheet(HTML) 16 Page - Intersil Corporation |
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16 / 22 page ![]() 16 FN9085.7 December 29, 2004 MOSFETs The choice of MOSFETs depends on the current each MOSFET will be required to conduct; the switching frequency; the capability of the MOSFETs to dissipate heat; and the availability and nature of heat sinking and air flow. LOWER MOSFET POWER CALCULATION The calculation for heat dissipated in the lower MOSFET is simple, since virtually all of the heat loss in the lower MOSFET is due to current conducted through the channel resistance (rDS(ON)). In Equation 13, IM is the maximum continuous output current; IPP is the peak-to-peak inductor current (see Equation 1); d is the duty cycle (VOUT/VIN); N is the number of active channels; and L is the per-channel inductance. An additional term can be added to the lower-MOSFET loss equation to account for additional loss accrued during the dead time when inductor current is flowing through the lower-MOSFET body diode. This term is dependent on the diode forward voltage at IM, VD(ON); the switching frequency, fS; and the length of dead times, td1 and td2, at the beginning and the end of the lower-MOSFET conduction interval respectively. Thus the total maximum power dissipated in each lower MOSFET is approximated by the summation of PL and PD. UPPER MOSFET POWER CALCULATION In addition to rDS(ON) losses, a large portion of the upper- MOSFET losses are due to currents conducted across the input voltage (VIN) during switching. Since a substantially higher portion of the upper-MOSFET losses are dependent on switching frequency, the power calculation is more complex. Upper MOSFET losses can be divided into separate components involving the upper-MOSFET switching times; the lower-MOSFET body-diode reverse- recovery charge, Qrr; and the upper MOSFET rDS(ON) conduction loss. When the upper MOSFET turns off, the lower MOSFET does not conduct any portion of the inductor current until the voltage at the phase node falls below ground. Once the lower MOSFET begins conducting, the current in the upper MOSFET falls to zero as the current in the lower MOSFET ramps up to assume the full inductor current. In Equation 15, the required time for this commutation is t1 and the approximated associated power loss is PUP,1. The upper MOSFET begins to conduct and this transition occurs over a time t2. In Equation 16, the approximate power loss is PUP,2. A third component involves the lower MOSFET’s reverse- recovery charge, Qrr. Since the inductor current has fully commutated to the upper MOSFET before the lower- MOSFET’s body diode can draw all of Qrr, it is conducted through the upper MOSFET across VIN. The power dissipated as a result is PUP,3 and is approximately Finally, the resistive part of the upper MOSFET’s dissipation is given in Equation 18 as PUP,4. In this case, of course, rDS(ON) is the on resistance of the upper MOSFET. The total power dissipated by the upper MOSFET at full load can now be approximated as the summation of the results from Equations 15, 16, 17 and 18. Since the power equations depend on MOSFET parameters, choosing the correct MOSFETs can be an iterative process that involves repetitively solving the loss equations for different MOSFETs and different switching frequencies until converging upon the best solution. Current Sensing The ISEN pins are denoted ISEN1 and ISEN2. The resistors connected between these pins and their respective phase nodes determine the gain in the load-line regulation loop and the channel-current balance loop. Select the values for these resistors based on the room temperature rDS(ON) of the lower MOSFETs; the full-load operating current, IFL; according to Equation 19 (see also Figure 4). In certain circumstances, it may be necessary to adjust the value of one or both of the ISEN resistors. This can arise when the components of one channel are inhibited from dissipating their heat so that the affected channel runs hotter than desired (see the section entitled Channel-Current P L r DS ON () I M 2 ------ 2 1d – () I LPP , 2 1d – () 12 -------------------------------- + = (EQ. 13) P D V DON () fS I M 2 ------ IPP 2 --------- + t d1 I M 2 ------ I PP 2 --------- – t d2 + = (EQ. 14) P UP 1 , V IN I M 2 ------ I PP 2 --------- + t1 2 ---- f S ≈ (EQ. 15) P UP 2 , V IN I M 2 ------ I PP 2 --------- – t 2 2 ---- f S ≈ (EQ. 16) P UP 3 , V IN Qrr fS ≈ (EQ. 17) P UP 4 , r DS ON () I M 2 ------ 2 d I PP 2 12 ---------- + = (EQ. 18) R ISEN r DS ON () 50 10 6 – × ----------------------- I FL 2 -------- = (EQ. 19) ISL6569 |
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