IRG4RC10SD

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9

V g

GAT E SIG NA L

DE VICE UNDER T E ST

CURRENT D.U.T.

VO L TAG E IN D.U.T.

CURRENT IN D1

t0

t1

t2

D.U.T.

V *

c

50V

L

1000V

6000µ F

100 V

Figure 19. Clamped Inductive Load Test Circuit

Figure 20. Pulsed Collector Current

Test Circuit

480V

0 - 480V

Package Outline

TO-252AA Outline

Dimensions are shown in millimeters (inches)

6.73 (.2 65 )

6.35 (.2 50 )

- A -

4

1

2

3

6.22 (.2 45 )

5.97 (.2 35 )

- B -

3X

0.89 (.0 35 )

0.64 (.0 25 )

0.25 (.0 10 )

M

A M B

4.57 ( .18 0)

2.28 (.0 90 )

2X

1.1 4 (.0 45)

0.7 6 (.0 30)

1.52 ( .06 0)

1.15 ( .04 5)

1.02 (.04 0)

1.64 (.02 5)

5.46 (.21 5)

5.21 (.20 5)

1.27 ( .0 50)

0.88 ( .0 35)

2.3 8 (.0 94 )

2.1 9 (.0 86 )

1.1 4 ( .0 45)

0.8 9 ( .0 35)

0.58 (.02 3)

0.46 (.01 8)

6.45 (.24 5)

5.68 (.22 4)

0.51 (.020)

M IN .

0.58 (.0 23)

0.46 (.0 18)

L EAD ASSIG N M E NT S

1 - G A TE

2 - D R A IN

3 - SOURCE

4 - D R A IN

10 .42 (.41 0)

9.40 (.3 70 )

NOT E S:

1 DIM EN SIO NING & TO L E RANCING PE R ANSI Y14 .5 M, 19 82.

2 CONTROLL ING DIM E NSIO N : IN CH.

3 CONFORM S T O JE DEC OUTL IN E TO - 252 AA.

4 DIM EN SIO NS SHOW N ARE BEFO RE SO LD ER DIP,

S O L D ER D IP M A X. + 0.16 (.0 06 ).

LEAD ASSIGNMENTS

1 - GATE

2 - COLLECTOR

3 - EMITTER

4 - COLLECTOR