AN1318 - APPLICATION NOTE

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Note: In the board layout both parallel resistor terminations should be located as close as possible to the

coupling capacitors.

10. INTERFACING LVDS TO ECL.

Figure 10: Interfacing LVDS to ECL

DC voltage can be generated with a resistor divider depending on the VCC value.

Examples: VCC=GND and VEE=-5V => R1=1.2kOhm and R2=3.4kOhm

VCC=GND and VEE=-3.3V => R1=680Ohm and R2=1kOhm

Note: In the board layout for both interfaces the resistors and capacitors should be located as close as

possible to the ECL input.

11. CAPACITIVE COUPLING LVDS TO ECL.

Several ECL devices supply a VBB (VBB~VCC-1.3V) reference voltage. It can be used for differential

capacitive coupling.

The 100kOhm gives stable determined output states during null signal conditions.

Figure 11: Capacitive Coupling LVDS to ECL Using VBB

LVDS

3.3V

ECL

R1

R2

R2

10 pF

10 pF

R1

Z = 50

Ω

Z = 50

Ω

100

Ω

VCC

VEE

LVDS

ECL

VCC

Z=50

Ω

Z=50

Ω

100

Ω

10pF

10pF

1k

Ω

1k

Ω

20k

Ω to 100kΩ

VBB

10nF