Phase Margin:

Φ : = 180 + ΦF(2 ⋅ π ⋅ fc)

Φ = 62.563

°

Feedback Network Implementation (resistive load, refer to fig. 8a):

Equivalent Load Resistance

R7:

=

OVP

40

R7 = 1

k

Ω

Output Divider Lower Resistor

R8:

=

2.5

⋅ R7

R8 = 6.289

k

Ω

Series Feedback Capacitor

C3:

=

10

6

2

C3 = 2122

nF

Series Feedback Resistor

R11:

=

10

6

2

R11 = 5

k

Ω

AN1089 APPLICATION NOTE

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