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AN4149 Datasheet(PDF) 29 Page - STMicroelectronics

Part # AN4149
Description  Designing a CCM PFC pre-regulator based on the L4984D
PDF  43 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4149 Datasheet(HTML) 29 Page - STMicroelectronics

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AN4149
L4984D biasing circuitry
In this application example a RmultH = 6.9 MΩ and a RmultL = 51 kΩ have been selected.
Please note that for RmultH a resistor with a suitable voltage rating (> 400 V) is needed, or
more resistors in series will have to be used.
The voltage on the multiplier pin with the selected component values re-calculated at
minimum line voltage is 0.93 V and at maximum line voltage is 2.74 V, so the multiplier will
work correctly within its linear region. Finally, depending on the MULT resistors the brownout
functions also have to be checked, calculating the VSTART and VSTOP voltages:
Equation 83
Equation 84
Start and stop PFC voltages are suitable for correct operation by the PFC; the MULT divider
has to be set considering these two voltages, in order to disable the PFC with an anomalous
input low mains voltage that could cause an overheating of the PFC due to the higher input
mains current. In order to set the required voltage startup threshold reiterations could be
required by selecting MULT resistors and checking the actual PFC start voltage.
3.4
Gate driver (GD) and VCC pins
Pin 8 (GND): this pin acts as the current return both for the signal internal circuitry and for
the gate drive current. When laying out the printed circuit board, these two paths should run
separately.
Pin 9 (GD): is the output of the driver. The pin is able to drive an external MOSFET with
600 mA source and 800 mA sink capability.
The high-level voltage of this pin is clamped at about 12 V to avoid excessive gate voltages
in case the pin is supplied with a high Vcc. To avoid undesired switch-on of the external
MOSFET because of some leakage current when the supply of the L4984D is below the
UVLO threshold, an internal pull-down circuit holds the pin low. The circuit guarantees 1.1 V
maximum on the pin (at Isink=2mA), with Vcc > VCC_ON. This allows omitting the "bleeder"
resistor connected between the gate and the source of the external MOSFET used for this
purpose.
Pin 10 (VCC): is the supply of the device. This pin will be externally connected to the startup
circuit (usually, one resistor connected to the rectified mains) and to the self-supply circuit.
Whatever the configuration of the self-supply system, a capacitor will be connected between
this pin and ground. To start the L4984D, the voltage must exceed the startup threshold (12
V typ.). Below this value the device does not work and consumes around 65 µA (typ.) from
VCC. This allows the use of high value startup resistors (in the hundreds of kΩ), which
reduces power consumption and optimizes system efficiency at low load, especially in wide-
range mains applications. When operating, the current consumption (of the device only, not
considering the gate drive current) rises to a value depending on the operating conditions
but never exceeding 6 mA. The device keeps on working as long as the supply voltage is
over the UVLO threshold (13 V max). If the VCC voltage exceeds 22.5 V, an internal Zener
multL
multL
multH
START
R
R
R
V
V
+
=
2
88
.
0
V
k
k
M
V
V
START
29
.
77
56
56
9
.
6
2
88
.
0
=
Ω
Ω
+
Ω
=
multL
multL
multH
STOP
R
R
R
V
V
+
=
2
80
.
0
V
k
k
M
V
V
STOP
2
.
70
51
51
9
.
6
2
80
.
0
=
Ω
Ω
+
Ω
=



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