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LTC1520 Datasheet(PDF) 6 Page - Linear Technology |
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LTC1520 Datasheet(HTML) 6 Page - Linear Technology |
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6 / 8 page ![]() 6 LTC1520 APPLICATIONS INFORMATION Theory of Operation Unlike typical line receivers whose propagation delay can vary by as much as 500% from package to package and show significant temperature drift, the LTC1520 employs a novel architecture that produces a tightly controlled and temperature compensated propagation delay. The differ- ential timing skew is also minimized between rising and falling output edges, and the propagation delays of any two receivers within a package are very tightly matched. The precision timing features of the LTC1520 reduce overall system timing constraints by providing a narrow 6ns window during which valid data appears at the re- ceiver output. This output timing window applies to all receivers in separate packages over all operating tempera- tures thereby making the LTC1520 well suited for high speed parallel data transmission applications such as backplanes. In clocked data systems, the low skew minimizes duty cycle distortion of the clock signal. The LTC1520 can propagate signals at frequencies up to 25MHz (50Mbps) with less than 5% duty cycle distortion. When a clock signal is used to retime parallel data, the maximum recom- mended data transmission rate is 25Mbps to avoid timing errors due to clock distortion. Rail-to-rail input common mode range enables the LTC1520 to be used in both single-ended and differential applica- tions with transmission distances up to 100 feet. Thermal shutdown and short-circuit protection prevent latchup damage to the LTC1520 during fault conditions. Single-Ended Applications Over short distances, the LTC1520 can be configured to receive single-ended data by tying one input to a fixed bias voltage and connecting the other input to the driver output. In such applications, standard high speed CMOS logic may be used as a driver for the LTC1520. The receiver trip points may be easily adjusted to accommodate different driver output swings by changing the resistor divider at the fixed input. Figure 6a shows a single-ended receiver configuration with the driver and receiver connected via PC traces. Note that at very high speeds, transmission line and driver ringing effects have to be considered. Motorola’s MECL System Design Handbook serves as an excellent reference for transmission line and termination effects. To mitigate transmission errors and duty cycle distortion due to driver ringing, a small output filter or a dampening resistor on VDD may be needed as shown in Figure 6b. To transmit single-ended data over distances up to 10 feet, twisted pair is recommended with the unused wire grounded at both ends (Figure 7). Figure 7. Medium Distance Single-Ended Transmission Using a CMOS Driver – + 1/4 LTC1520 10-FT TWISTED PAIR MC74ACT04 MC74AC04 0.01 µF 120 Ω 3.3k 5V 2.2k 1520 F07 Figure 6b. Techniques to Minimize Driver Ringing 10 Ω PC TRACE OR PC TRACE 0.01 µF MC74AC04 1520 F06b 10pF 10 Ω Figure 6a. Single-Ended Receiver – + 2.2k 5V PC TRACE 1/4 LTC1520 MC74ACT04 (TTL INPUT) MC74AC04 (CMOS INPUT) 2.2k 1520 F06a 0.01 µF Differential Transmission The LTC1520 is well suited for medium distance differen- tial transmission due to its rail-to-rail input common mode range. Clock rates up to 25MHz can be transmitted over 100 feet of high quality twisted pair. Figure 8 shows the |
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