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LTC3459 Datasheet(PDF) 6 Page - Linear Technology |
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LTC3459 Datasheet(HTML) 6 Page - Linear Technology |
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6 / 12 page ![]() LTC3459 6 3459fc PIN FUNCTIONS VIN (Pin 1/Pin 6/Pin 6): Input Supply Pin. Bypass VIN with a low ESR, ESL ceramic capacitor of at least 1μF. VOUT (Pin 2/Pin 2/Pin 5): Regulated Output Voltage of the Boost Regulator. Bypass VOUT with a low ESR, ESL ceramic capacitor between 2.2μF and 10μF. VOUT ripple increases with smaller capacitors. SHDN(Pin3/Pin1/Pin4):MasterShutdownInput.Driving SHDN low disables all IC functions and reduces quiescent current from the battery to less than 1μA. This pin must be pulled above 1V to enable the IC. FB (Pin 4/Pin 3/Pin 3): Input to the Burst Mode Comparator. An external resistor divider connected between VOUT, GND and this pin sets the output voltage to: VOUT = 1.22(1 + R1/R2) GND (Pin 5/Pin 5/Pin 2): Signal and Power Ground. Provide a short, direct PCB path between GND and the (–) side of the filter capacitors on VIN and VOUT. SW (Pin 6/Pin 4/Pin 1): Switch Pin. Connect a 15μH to 33μH inductor between SW and VIN.KeepPCBtracelengths as short and wide as possible to reduce EMI and voltage overshoot. If the inductor current falls to zero, the internal P-channel MOSFET synchronous rectifier is turned off to prevent reverse charging of the inductor. Exposed Pad (Pin 7/Pin 7, DC and DCB Packages Only): Ground. The Exposed Pad must be soldered to PCB. (DC/DCB/S6 Packages) BLOCK DIAGRAM VIN IZERO DETECT IZO IPEAK tOFF VCC VOUT SLEEP DELAY IPEAK DETECT tOFF TIMER VSELECT VBEST P-DRIVE HYSTCOMP N-DRIVE SW1 SW VOUT FB R2 SD SDB 3459 BD R1 R SD THERMAL SD VSELECT VBEST VCC P/~N IZO SDB SD N-DRIVE P-DRIVE QB Q QB Q RD S RD S QB Q REFERENCE VCC SHDN GND REFOK OFF ON |
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