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AN4625 Datasheet(PDF) 21 Page - STMicroelectronics |
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AN4625 Datasheet(HTML) 21 Page - STMicroelectronics |
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21 / 26 page ![]() DocID027187 Rev 1 21/26 AN4625 EMC requirements 26 4 EMC requirements 4.1 Procedure to evaluate the robustness of the CLT01-38S4 The IEC 61131-2 international standard is the reference to evaluate the CLT01-38S4 robustness. This standard provides all requirements and test conditions for programmable logic controllers (PLCs) and their associated peripherals. It specifies the electromagnetic compatibility (EMC) requirements and the nature of the tests to perform and to determine if the system meets these requirements. The levels of each test depend on the zone where the system is installed. The most typical industrial environmental levels correspond to zone B: local power distribution zone and dedicated power distribution zone (see EMC immunity zones of the IEC 61131-2-Ed2 standard). The following sections deal with the test levels for this zone. 4.2 ESD tests (IEC 61000-4-2) Electrostatic discharge test is applied to operator accessible devices. This means that these tests have to be performed on each connector pin. The required levels are air discharge: ± 8 kV and contact discharge: ± 4 kV. PLC system continues operating. Temporary degradation of the performance is acceptable during the test, but the system must recover after the test (criteria “B” according to the IEC61131-2 standard). 4.3 Burst tests (IEC 61000-4-4) The fast transient burst tests must be applied to all input pins of the system. A capacitive clamp-coupling device (50-200 pF) must be used as described in the IEC 61000-4-4 standard. The required burst voltage levels are the analog or DC I/O: ± 1 kV, DC power line: ± 2 kV. PLC system continues operating. Temporary degradation of the performance is acceptable during the test, but the system must recover after the test (criteria “B” according to the IEC 61131-2 standard). 4.4 Surge test (IEC 61000-4-5) Since the voltage surge consists of a single but energetic pulse, the CLT01-38S4 embeds an overvoltage protection on each point. The absorbed energy complies at least with the IEC 61131-2 standard requirements. The high energy surge test must be applied on all input pins of the system. For all analog inputs, the coupling method is a 42 Ω serial resistor and a capacitor of 0.5 µF. For DC power line, the coupling is 2 Ω, 18 µF for differential mode, and 12 Ω, 9 µF for common mode. Required voltage surge levels are: • Analog or DC I/O: 0.5 kV (differential and common coupling modes) • DC power line: 0. 5 kV (differential mode) • DC power line: 1 kV (common mode) The PLC system continues operating. Temporary degradation of the performance is acceptable during the test, but the system must recover after the test (criteria “B” according to the IEC 61131-2 standard). |
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