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UPD61P24CS Datasheet(PDF) 9 Page - NEC |
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UPD61P24CS Datasheet(HTML) 9 Page - NEC |
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9 / 36 page  µPD61P24 9 11. PIN FUNCTIONS 11.1 KI/O Pin (P0) This is the 8-bit I/O pin for key-scan output. When the control register (P1) is set for the input port, the port can be used as an 8-bit input pin. When the port is set for the input mode, all of these pins are pulled down to the VSS level inside the LSI. At reset (all cleared), the value of I/O mode and output latch becomes undefined. Figure 11-1. KI/O Pin Organization KI/O7 KI/O6 KI/O5 KI/O4 KI/O3 KI/O2 KI/O1 KI/O0 P0 P10 P00 (P ) Control register 1 11.2 KI/O Pull-Down Resistor Configuration V DD V SS CMOS N-ch Pin Pull-down resistor Input signal Output signal Input/output selection N-ch P-ch R When KI/O is set to the input mode, pull-down resistor R is turned on. |
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