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UPD703003A Datasheet(PDF) 24 Page - NEC |
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UPD703003A Datasheet(HTML) 24 Page - NEC |
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24 / 40 page  µPD703003A, 703004A, 703025A 24 Data Sheet U13188EJ4V0DS00 (5) Read timing (1/2) Parameter Symbol Conditions 25 MHz Version 33 MHz Version Unit MIN. MAX. MIN. MAX. Delay time from CLKOUT ↑ to address <20> tDKA 3 20 3 20 ns Delay time from CLKOUT ↑ to R/W, UBEN, LBEN <78> tDKA2 –2 +13 –2 +13 ns Delay time from CLKOUT ↑ to address float <21> tFKA 3 15 3 15 ns Delay time from CLKOUT ↓ to ASTB <22> tDKST 3 15 3 15 ns Delay time from CLKOUT ↑ to DSTB <23> tDKD 3 15 3 15 ns Data input setup time (to CLKOUT ↑) <24> tSIDK 55 ns Data input hold time (from CLKOUT ↑) <25> tHKID 55 ns WAIT setup time (to CLKOUT ↓) <26> tSWTK 55 ns WAIT hold time (from CLKOUT ↓) <27> tHKWT 55 ns Address hold time (from CLKOUT ↑) <28> tHKA 00 ns Address setup time (to ASTB ↓) <29> tSAST –40 °C ≤ TA ≤ +70°C 0.5T – 10 0.5T – 10 ns 70 °C < TA ≤ 85°C 0.5T – 12 0.5T – 12 ns Address hold time (from ASTB ↓) <30> tHSTA 0.5T – 10 0.5T – 10 ns Delay time from DSTB ↓ to address float <31> tFDA 00 ns Data input setup time (to address) <32> tSAID –40 °C ≤ TA ≤ +70°C (2 + n)T – 22 (2 + n)T – 22 ns 70 °C < TA ≤ 85°C (2 + n)T – 25 (2 + n)T – 25 ns Data input setup time (to DSTB ↓) <33> tSDID –40 °C ≤ TA ≤ +70°C (1 + n)T – 20 (1 + n)T – 20 ns 70 °C < TA ≤ 85°C (1 + n)T – 24 (1 + n)T – 24 ns Delay time from ASTB ↓ to DSTB↓ <34> tDSTD 0.5T – 10 0.5T – 10 ns Data input hold time (from DSTB ↑) <35> tHDID 00 ns Delay time from DSTB ↑ to address output <36> tDDA (1 + i)T (1 + i)T ns Delay time from DSTB ↑ to ASTB↑ <37> tDDSTH 0.5T – 10 0.5T – 10 ns Delay time from DSTB ↑ to ASTB↓ <38> tDDSTL (1.5 + i)T – 10 (1.5 + i)T – 10 ns DSTB low-level width <39> tWDL –40 °C ≤ TA ≤ +70°C (1 + n)T – 10 (1 + n)T – 10 ns 70 °C < TA ≤ 85°C (1 + n)T – 13 (1 + n)T – 13 ns ASTB high-level width <40> tWSTH T – 10 T – 10 ns WAIT setup time (to address) <41> tSAWT1 n ≥ 1, –40°C ≤ TA ≤ +70°C 1.5T – 20 1.5T – 20 ns n ≥ 1, 70°C < TA ≤ 85°C 1.5T – 24 1.5T – 24 ns <42> tSAWT2 n ≥ 1, –40°C ≤ TA ≤ +70°C (1.5 + n)T – 20 (1.5 + n)T – 20 ns n ≥ 1, 70°C < TA ≤ 85°C (1.5 + n)T – 24 (1.5 + n)T – 24 ns WAIT hold time (from address) <43> tHAWT1 n ≥ 1 (0.5 + n)T (0.5 + n)T ns <44> tHAWT2 n ≥ 1 (1.5 + n)T (1.5 + n)T ns WAIT setup time (to ASTB ↓) <45> tSSTWT1 n ≥ 1, –40°C ≤ TA ≤ +70°C T – 18 T – 18 ns n ≥ 1, 70°C < TA ≤ 85°C T – 20 T – 20 ns <46> tSSTWT2 n ≥ 1 (1 + n)T – 15 (1 + n)T – 15 ns WAIT hold time (from ASTB ↓) <47> tHSTWT1 n ≥ 1nT nT ns <48> tHSTWT2 n ≥ 1 (1 + n)T (1 + n)T ns Remarks 1. T = tCYK 2. n indicates the number of wait clocks that are inserted during a bus cycle. The sampling timing may vary when using the programmable wait insertion function. 3. i indicates the number of idle states (0 or 1) that are inserted after a read cycle. 4. Maintain at least one of the two data input hold times, either tHKID (<25>) or tHDID (<35>). |
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