AN3139 datasheet(47/63 Pages) STMICROELECTRONICS

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AN3139

Block-by-block compatibility analysis

Doc ID 16993 Rev 3

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3.9

Clock controller

The clock controller in the STM8L15x sub-family is a superset of the clock controller used in

the STM8L10x sub-family:

●

The common features are:

–

HSI/8 is the default system clock after startup

–

CCO feature, with more options for the STM8L15x sub-family

–

HSI and LSI features (low power, low cost but not accurate)

–

Peripheral clocks are disabled after reset. The user should enable a peripheral

clock before using it.

●

The additional features in the STM8L15x/STM8L16x sub-family are:

System clock switching: the clock switching feature provides an easy to use, fast and

secure way for the application to switch from one system clock source to another: HSE,

HSI, LSE and LSI (with configurable divider). The only system clock available in the

STM8L10x sub-family is the HSI (with configurable divider).

The clock security system (CSS): if the HSE clock fails due to a broken or disconnected

resonator or any other reason, the clock controller activates a stall-safe recovery

mechanism by automatically switching to the HSI with the same division factor as that

used before the HSE clock failure.

More HSE and LSE oscillators (higher cost but better accuracy)

More clock settings for new peripherals (LCD, RTC, DAC, DMA...)

The Clock Security System (CSS) to monitor LSE crystal clock source failures when

the LSE is used as RTC clock. This feature is implemented on low, medium+ and high

density devices.

The following table gives an overview of clocks and oscillators supported in the STM8L

family.

Table 16.

USART special features

USART features

STM8L10x

sub-family

STM8L15x/STM8L16x

sub-family

Asynchronous mode

Hardware Flow Control

Multibuffer communication (DMA)

Multiprocessor communication

Synchronous

Smartcard

Half-duplex (single-wire mode)

IrDA

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