LT3013B datasheet(7/16 Pages) LINER

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LT3013B

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PIN FUNCTIONS (DFN/TSSOP)

NC (Pins 1, 8, 9, 12/Pins 2, 11, 12, 15): No Connect. No

Connect pins may be ﬂoated, tied to IN or tied to GND.

OUT (Pins 2, 3/Pins 3, 4): Output. The output supplies

power to the load. A minimum output capacitor of 3.3μF

is required to prevent oscillations. Larger output capaci-

tors will be required for applications with large transient

loads to limit peak voltage transients. See the Applications

Information section for more information on output ca-

pacitance and reverse output characteristics.

ADJ (Pin 4/Pin 5): Adjust. This is the input to the error

ampliﬁer. This pin is internally clamped to ±7V. It has a

bias current of 30nA which ﬂows into the pin (see curve

of ADJ Pin Bias Current vs Temperature in the Typical

Performance Characteristics). The ADJ pin voltage is

1.24V referenced to ground, and the output voltage range

is 1.24V to 60V.

GND (Pin 5/Pins 1, 6, 8, 9, 16): Ground.

PWRGD (Pin 6/Pin 7): Power Good. The PWRGD ﬂag is

an open-collector ﬂag to indicate that the output voltage

has come up to above 90% of the nominal output voltage.

There is no internal pull-up on this pin; a pull-up resistor

must be used. The PWRGD pin will change state from an

open-collector to high impedance after both the output

is above 90% of the nominal voltage and the capacitor

on the CT pin has charged through a 1V differential. The

maximum pull-down current of the PWRGD pin in the low

state is 50μA.

CT (Pin 7/Pin 10): Timing Capacitor. The CT pin allows

the use of a small capacitor to delay the timing between

the point where the output crosses the PWRGD thresh-

old and the PWRGD ﬂag changes to a high impedance

state. Current out of this pin during the charging phase

is 3μA. The voltage difference between the PWRGD low

and PWRGD high states is 1.6V (see the Applications

Information Section).

IN (Pins 10, 11/Pins 13,14): Input. Power is supplied

to the device through the IN pin. A bypass capacitor is

required on this pin if the device is more than six inches

away from the main input ﬁlter capacitor. In general, the

output impedance of a battery rises with frequency, so it is

advisable to include a bypass capacitor in battery-powered

circuits. A bypass capacitor in the range of 1μF to 10μF is

sufﬁcient. The LT3013B is designed to withstand reverse

voltages on the IN pin with respect to ground and the OUT

pin. In the case of a reversed input, which can happen if

a battery is plugged in backwards, the LT3013B will act

as if there is a diode in series with its input. There will be

no reverse current ﬂow into the LT3013B and no reverse

voltage will appear at the load. The device will protect both

itself and the load.

Exposed Pad (Pin 13/Pin 17): Ground. The exposed

backside of the package is an electrical connection for

GND. As such, to ensure optimum device operation and

thermal performance, the Exposed Pad must be connected

directly to Pin 5/Pin 6 on the PC board.

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