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AN3232 Datasheet(PDF) 24 Page - STMicroelectronics |
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AN3232 Datasheet(HTML) 24 Page - STMicroelectronics |
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24 / 26 page ![]() Conclusion AN3232 24/26 Doc ID 17594 Rev 3 12 Conclusion This application note provides a set of guidelines to be considered for the proper attachment of STAC packages. While these recommendations are intended to address the majority of user applications, the flexibility afforded by this new generation of package technology enables new approaches for amplifier assembly as well as novel system architectures. In the search for constant improvement, ST continues to address customer needs by improving the robustness of the STAC package line and by releasing additional outlines with more functionality and versatility. For these reasons, it is expected that these guidelines are to be revisited and updated over time. At present, these recommendations are expected to result in reliable mechanical, electrical, and thermal performance. Regarding the thermal expectations of STAC packages, this application note demonstrates the exceptional performance that can be attained when utilizing the solder-down mounting method; this can be viewed as the limiting case for lowest achievable thermal resistance. While the STAC package concept embodies highly customizable thermal solutions by means of chip carrier material substitution, the importance of an exceptionally low thermal resistance between the transistor case and the heatsink (RthC-HS) cannot be overstated. In the case presented, this interface accounts for only 0.025 °C/W, roughly half of what is achievable with industry standard flanged packages. In this regard, STAC packages afford intrinsic flatness and the highest available thermal conductivity materials, further enhancing cooling efficiency. Even without soldering, judicious selection of TIMS and respect to this set of guidelines results in RthC-HS values on the order of 0.05 °C/W. |
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