| Electronic Components Datasheet Search |
|
AN3371 Datasheet(PDF) 25 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
AN3371 Datasheet(HTML) 25 Page - STMicroelectronics |
|
25 / 45 page ![]() AN3371 Overview of the STM32 advanced RTC Doc ID 018624 Rev 5 25/45 1.8.3 Active time-stamp on tamper detection event By setting the TAMPTS bit to 1, any tamper event (with edge or level detection) causes a time-stamp to occur. Consequently, the time-stamp flag and time-stamp overflow flag are set at the moment when the tamper flag is set and work in the same manner as when a normal time-stamp event occurs. Note: It is not necessary to enable or disable the time-stamp function when using this feature. 1.9 Backup registers RTC_BKPxR, where x=0 to n backup registers (80 bytes), are reset when a tamper detection event occurs. These registers are powered-on by VBAT when VDD is switched off, so that they are not reset by a system reset, and their contents remain valid when the device operates in low-power mode. Note: The number “n” of backup registers depends on the product. Please refer to Table 15: Advanced RTC features. 1.10 RTC and low-power modes The RTC is designed to minimize the power consumption. The prescalers used for the calendar are divided into synchronous and asynchronous. Increasing the value of the asynchronous prescaler reduces the power consumption. Table 13. Tamper features (level detection) What to do How to do it Comments Enable Tamper Set the TAMP1E bit of RTC_TAFCR register to 1 Configure Tamper1 filter count Configure TAMPFLt bits in RTC_TAFCR register Default value is 0. Configure Tamper1 sampling frequency Configure TAMPFREQ bits in RTC_TAFCR register Default value is 1Hz Configure tamper precharge/discharge duration Set/Reset TAMPPUDIS bit in RTC_TAMPCR register select Tamper1 active edge/Level detection Select with TAMP1TRG bit in RTC_TAFCR register Edge or Level is depending on tamper filter configuration. Map Tamper1 pin alternate function Select with TAMP1INSEL bit in RTC_TAFCR register For F2 series devices, the Tamper1 pin can be either PI8 or PC13. Detect a Tamper1event by interrupt Set the TAMPIE bit in the RTC_TAFCR register An interrupt is generated when tamper detection event occurs. Detect a Tamper1 event by polling Poll on the time-stamp flag (TAMP1F) in the RTC_ISR register To clear the flag, write zero on the TAMP1F bit. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |