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LT3571

3571fa

TYPICAL APPLICATIONS

1μF

MONIN

VREF

SHDN

CTRL

GND

SYNC

VOUT

VIN

LT3571

MON

APD

OFF ON

VIN

20.5k

49.9Ω

45V

12.1k

1MHz

RSENSE

20Ω

3571 TA02a

0.1μF

10nF

10k

10nF

L: TDK VLF3010AT – 100MR49

C1: TDK X7R C1608X7R1C105KT

C2, C4: MURATA X7R GRM188R72A104KA35

C3: AVX X7R 06031C103K

C5: MURATA X7R GRM155R71H103K

50V

0.1μF

10μH

5V to 45V APD Bias Power Supply

Input Power vs APD Current

APD CURRENT (mA)

500

450

350

250

150

400

300

200

100

1.5

3571 TA02b

2.5

0.5

APPLICATIONS INFORMATION

Figure 6. High Frequency Path

LOAD

VOUT

SWITCH

NODE

3571 F06

VIN

HIGH

FREQUENCY

CIRCULATING

PATH

Setting APD Current Limit

The LT3571 has a unique current loop to limit the APD

current. Choose the sense resistor RSENSE across VOUT

and MONIN pins to set the APD current limit by using the

following formula:

RSENSE =

200mV

1.2 × IAPD (mA)+ 0.3mA

where IAPD is the APD current limit.

Layout Hints

The high speed operation of the LT3571 demands careful

attention to board layout. Advertised performance will not

be achieved with a careless layout. To prevent radiation

and high frequency resonance problems, proper layout of

the high frequency switching path is essential. Keep the

output switch (SW pin), diode and output capacitor as

close together as possible. Minimize the length and area

of all traces connected to the switch pin, and always use

a ground plane under the switching regulator to minimize

interplane coupling. The high speed switching current path

is shown in Figure 6. The signal path, including the switch,

output diode and output capacitor contains nanosecond rise

and fall times and should be kept as short as possible.

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