Additional recommendations

AN3992

20/22

Doc ID 022369 Rev 3

5

Additional recommendations

5.1

Firmware

The firmware implementation of the AES chaining modes provided with this application note

is intended to be used as a starting-point. This firmware may be tailored and simplified to

cover only the required features. For further information, refer to the AES section in the

RM0031 microcontroller reference manual.

5.2

Direct memory access (DMA)

The Direct Memory Access (DMA) can be used to handle input and output phases for better

performance, and to free the CPU for other tasks.

5.3

Encryption and decryption keys

The encryption key can be stored and protected in the EEPROM data memory. Refer to the

“Flash program memory and data EEPROM” section in the microcontroller reference

manual RM0031.

5.4

Block padding

AES-128 is a 128-bit block cryptography which means that AES encrypts a 128-bit plain text

providing a 128-bit cipher text. The text to be encrypted and decrypted can be of any length

and must be padded to get an exact multiple of a block size (128 bits) before being

processed (encrypted or decrypted).

In the following example of plain text, "The CR95HF is RF transceiver for ISO/IEC

14443, 15693 and 18092 protocols

" is split into 5 blocks. The last one, since its size

is 9 bytes, is padded by seven “0”.

Padding messages with “00” are not recommended. Padding must comply with

specifications such as ANSI X.923, ISO/IEC 10126 or PKCS7.