AN4539 datasheet(10/33 Pages) STMICROELECTRONICS

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HRTIM operating principles basics

AN4539

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HRTIM operating principles basics

Despite an apparent complexity due to the number of features and to its modular

architecture, the HRTIM is basically made of six 16-bit auto-reload up-counters with 4

compare registers each.

Period and compare programming

The high-resolution programming is made completely transparent, so as to have the look-

and-feel of a timer clocked by a 4.6 GHz clock (144MHz x 32), when using the HSE

oscillators. The timings (period and compare) can be directly written into a unique 16-bit

the formula:

PER

Tcounting

THigh res

–

--------------------------

For instance, a 10µs time period is obtained by setting the period register to 10µs / 217ps =

46082d and is programmed as follows:

HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_D].PERxR = 0x0000B400;

Should the result exceed the 16-bit range, the high-resolution can be adjusted by multiples

of 217 ps, so as to be have the period value within the 16-bit range.

Set/reset crossbar

Each timing unit holds the control of 2 outputs via a set/reset crossbar. Compared to usual

frozen PWM modes where the output is set at the beginning of the counting period and reset

on a given compare match, the crossbar offers much more flexibility in defining how an

ouput is set or reset. It gives the possibility to have any of timer events setting or resetting

an output.

Output stage

The waveform generated by the set / reset crossbar is finally passed through an output

stage for “post-processing” such as

•

generating complementary signal with a deadtime;

•

adding high-frequency modulation;

•

modifying the signal polarity;

•

shutting down the output for protection purpose.

With this few features in mind, it is now possible to elaborate the first elemental PWM

signals.

2.1

Single PWM generation

In this section we will discuss:

•

Timer continuous mode;

•

Simplest crossbar configuration;

•

Output stage enable.

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