6

LT1106

BLOCK DIAGRA

17

VPP2

20

BIAS

ON/0FF

16

14

G1

15

G2

18

VPP1

AVPP

12/5

SELECT

19

1

565k

299k

4k

200k

VPP VALID

OFF

Q3

Q2

1

×

Q1

50

×

100k

–

+

C2

R1

3

Ω

–

+

C3

36mV

PGND

LT1106 • BD

SW

R2

700

Ω

13

3,4

6,7

9,10,11

GND

2

SOFT START

BIAS

+

–

500kHz

OSCILLATOR

C1

5

3/5

3.7V

–

+

Functional Description

The LT1106 is a micropower, step-up DC/DC converter

specifically configured for PCMCIA flash memory card

VPP generation. The device generates a 5V or 12V output

selectable via the 12/5 Select pin. If 12V is present on

either the VPP1 or VPP2 pins, gate drive outputs G1 and

G2 are driven low, turning on external PMOS devices. The

switching regulator inside the LT1106 is idled when 12V

is present on VPP1 or VPP2.

The VPP VALID output goes low when the voltage at AVPP

exceeds 11.4V This signal can be used to indicate pres-

ence of a valid programming voltage. The 3/5 comparator

indicates whether the input voltage is 3.3V or 5V.

The Soft Start pin can be used to limit inrush current upon

start-up. A 0.1

µF capacitor in parallel with a 1M resistor is

connected between this pin and ground to limit peak

inductor current at start-up.

Switching Regulator Operation

When 12V is not present on the VPP1 or VPP2 pins and the

device is enabled (ON/OFF = 1), the LT1106 generates a

regulated voltage at the AVPP pin. This voltage is pro-

grammable between 5V or 12V depending on the state of

the 12/5 Select pin. Referring to the block diagram, hyster-

etic comparator C1 monitors AVPP via the resistor divider.

When the negative input of C2 falls below 1.24V, C1’s