LT1339C datasheet(9/20 Pages) LINER

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LT1339

OPERATION (Refer to Functional Block Diagram)

The current comparator trip threshold is set on the VC pin,

which is the output of a transconductance amplifier, or

error amplifier (EA). The error amplifier integrates the

difference between a feedback voltage (on the VFB pin)

and an internal bandgap generated reference voltage of

1.25V, forming a signal that represents required load

current. If the supplied current is insufficient for a given

load, the output will droop, thus reducing the feedback

voltage. The error amplifier forces current out of the VC

pin, increasing the current comparator threshold. Thus,

the circuit will servo until the provided current is equal to

the required load and the average output voltage is at the

value programmed by the feedback resistors.

Average Current Limit

The output of the sense amplifier is monitored by a single

pole integrator comprised of an external capacitor on the

IAVG pin and an internal impedance of approximately

50k

Ω. If this averaged value signal exceeds a level corre-

sponding to 120mV across the external sense resistor, the

current comparator threshold is clamped and cannot

continue to rise in response to the error amplifier. Thus, if

average load current requirements exceed 120mV/RSENSE,

the supply will current limit and the output voltage will fall

out of regulation. The average current limit circuit moni-

tors the sense amplifier output without slope compensa-

tion or ripple current contributions, therefore the average

load current limit threshold is unaffected by duty cycle.

Undervoltage Lockout

The LT1339 employs an undervoltage lockout circuit

(UVLO) that monitors the 12V supply rail. This circuit

disables the output drive capability of the LT1339 if

the 12V supply drops below about 9V. Unstable mode

switching is prevented through 350mV of UVLO threshold

hysteresis.

Adaptive Nonoverlapping Output Stage

The FET driver output stage implements adaptive

nonoverlapping control. This circuitry maintains dead

time independent of the type, size or operating conditions

of the switch elements. The control circuit monitors the

output gate drive signals, insuring that the switch gate

(being disabled) is fully discharged before enabling the

other switch driver.

Shutdown

The LT1339 can be put into low current shutdown mode

by pulling the RUN/SHDN pin low, disabling all circuit

functions. The shutdown threshold is a bandgap referred

voltage of 1.25V typical. Use of a precision threshold on

the shutdown circuit enables use of this pin for undervolt-

age protection of the VIN supply and/or power supply

sequencing.

Soft Start

The LT1339 incorporates a soft start function that oper-

ates by slowly increasing the internal current limit. This

limit is controlled by clamping the VC node to a low voltage

that climbs with time as an external capacitor on the SS pin

is charged with about 8

µA. This forces a graceful climb of

output current capability, and thus a graceful increase in

output voltage until steady-state regulation is achieved.

The soft start timing capacitor is clamped to ground

during shutdown and during undervoltage lockout, yield-

ing a graceful output recovery from either condition.

5V Internal Reference

Power for the oscillator timing elements and most other

internal LT1339 circuits is derived from an internal 5V

reference, accessible at the 5VREF pin. This supply pin can be

loaded with up to 10mA DC (20mA pulsed) for convenient

biasing of local elements such as control logic, etc.

Slope Compensation

For duty cycles greater than 50%, slope compensation is

required to prevent current mode duty cycle instability in

the regulator control loop. The LT1339 employs internal

slope compensation that is adequate for most applica-

tions. However, if additional slope compensation is

desired, it is available through the SL/ADJ pin. Excessive

slope compensation will cause reduction in maximum

load current capability and therefore is not desirable.

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