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UPD75328 Datasheet(PDF) 23 Page - NEC |
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UPD75328 Datasheet(HTML) 23 Page - NEC |
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23 / 66 page ![]() Internal bus 8 8 SET1* TM07 TM06 TM05 TM04 TM03 TM02 TM01 TM00 TM0 PORT1.3 Input buffer P13/TI0 From the clock generator MPX *:Instruction execution Timer operation start signal CP 8 8 Modulo register (8) Comparator (8) Count register (8) Clear T0 TMOD0 Reset TOE0 PORT2.0 Bit 2 of PGMB To serial interface P20/PTO0 INTT0 IRQT0 set signal () RESET IRQT0 clear signal Output buffer TOUT F/F TO enable flag P20 output latch Port 2 input/ output mode Coinci- dence 8 Fig. 5-5 Timer/Event Counter Block Diagram |
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