8

LT1783

APPLICATIO S I FOR ATIO

Supply Voltage

The positive supply pin of the LT1783 should be bypassed

with a small capacitor (typically 0.1

µF) within an inch of

the pin. When driving heavy loads, an additional 4.7

µF

electrolytic capacitor should be used. When using split

supplies, the same is true for the negative supply pin.

The LT1783 is protected against reverse battery voltages

up to 18V. In the event a reverse battery condition occurs,

the supply current is less than 1nA.

Inputs

The LT1783 has two input stages, NPN and PNP (see the

Simplified Schematic), resulting in three distinct operat-

ing regions as shown in the Input Bias Current vs Common

Mode typical performance curve.

input stage is active and the input bias current is typically

–40nA. When the input common mode voltage is within

0.5V of the positive rail, the NPN stage is operating and the

Supply Current vs SHDN Pin

Voltage

Large-Signal Response

Small-Signal Response

SHUTDOWN PIN VOLTAGE (V)

0

0.5

1

1.5

2

2.5

1783 G25

275

250

225

200

175

150

125

100

75

50

25

0

1783 G26

1783 G27

TYPICAL PERFOR A CE CHARACTERISTICS

Total Harmonic Distortion + Noise

vs Output Voltage Amplitude

Open-Loop Gain

OUTPUT VOLTAGE (V)

–6

–4

–2

0246

–5

–3

–1

1

3

5

1783 G24

0.1

1

0123

1783 G23

0.01

0.001

10