LTC1142HVCG datasheet(13/20 Pages) LINER

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LTC1142/LTC1142L/LTC1142HV

APPLICATIO S I FOR ATIO

current. When a load step occurs, VOUT shifts by an

amount equal to

∆ILOAD × ESR, where ESR is the

effective series resistance of COUT. ∆ILOAD also begins to

charge or discharge COUT until the regulator loop adapts

to the current change and returns VOUT to its steady-

state value. During this recovery time VOUT can be

monitored for overshoot or ringing which would indicate

a stability problem. The Pin 27 (13) external components

shown in the Figure 1 circuit will prove adequate com-

pensation for most applications.

A second, more severe transient is caused by switching in

loads with large (>1

µF) supply bypass capacitors. The

discharged bypass capacitors are effectively put in parallel

with COUT, causing a rapid drop in VOUT. No regulator can

deliver enough current to prevent this problem if the load

switch resistance is low and it is driven quickly. The only

solution is to limit the rise time of the switch drive so that

the load rise time is limited to approximately 25

× CLOAD.

Thus a 10

µF capacitor would require a 250µs rise time,

limiting the charging current to about 200mA.

Efficiency Considerations

The percent efficiency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

produce the most improvement. Percent efficiency can be

expressed as:

%Efficiency = 100% – (L1 + L2 + L3 + ...)

where L1, L2, etc., are the individual losses as a percent-

age of input power. (For high efficiency circuits only small

errors are incurred by expressing losses as a percentage

of output power.)

Although all dissipative elements in the circuit produce

losses, three main sources usually account for most of the

losses in LTC1142 circuits:

1. LTC1142 DC bias current

2. MOSFET gate charge current

3. I

2R losses

1. The DC supply current is the current which flows into

VIN (pin 24 for the 3.3V section, Pin 10 for the 5V

section) less the gate charge current. For VIN = 10V the

LTC1142 DC supply current for each section is 160

µA

with no load, and increases proportionally with load up

to a constant 1.6mA after the LTC1142 has entered

continuous mode. Because the DC bias current is

drawn from VIN, the resulting loss increases with input

voltage. For VIN = 10V the DC bias losses are generally

less than 1% for load currents over 30mA. However, at

very low load currents the DC bias current accounts for

nearly all of the loss.

2. MOSFET gate charge current results from switching

the gate capacitance of the power MOSFETs. Each time

a MOSFET gate is switched from low to high to low

again, a packet of charge dQ moves from VIN to ground.

The resulting dQ/dt is a current out of VIN which is

typically much larger than the DC supply current. In

continuous mode, IGATE(CHG) = f (QN + QP). The typical

gate charge for a 0.1

Ω N-channel power MOSFET is

25nC, and for a P-channel about twice that value. This

results in IGATE(CHG) = 7.5mA in 100kHz continuous

operation, for a 2% to 3% typical mid-current loss with

VIN = 10V.

Note that the gate charge loss increases directly with

both input voltage and operating frequency. This is the

principal reason why the highest efficiency circuits

operate at moderate frequencies. Furthermore, it ar-

gues against using larger MOSFETs than necessary to

control I

2R losses, since overkill can cost efficiency as

well as money!

3. I

2R losses are easily predicted from the DC resistances

of the MOSFET, inductor, and current shunt. In continu-

ous mode the average output current flows through L

and RSENSE, but is “chopped” between the P-channel

and N-channel MOSFETs. If the two MOSFETs have

approximately the same RDS(ON), then the resistance of

one MOSFET can simply be summed with the resis-

tances of L and RSENSE to obtain I2R losses. For

example, if each RDS(ON) = 0.1Ω, RL = 0.15Ω, and

RSENSE = 0.05Ω, then the total resistance is 0.3Ω. This

results in losses ranging from 3% to 12% as the output

current increases from 0.5A to 2A. I2R losses cause the

efficiency to roll off at high output currents.

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