LTC1412CG datasheet(13/16 Pages) LINER

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LTC1412

APPLICATIONS INFORMATION

plane to the power supply should be low impedance.

Digital circuitry grounds must be connected to the digital

supply common. Low impedance analog and digital power

supply lines are essential to low noise operation of the

ADC. The traces connecting the pins and bypass capaci-

tors must be kept short and should be made as wide as

possible.

The LTC1412 has differential inputs to minimize noise

coupling. Common mode noise on the AIN+ and AIN– leads

will be rejected by the input CMRR. The AIN– input can be

used as a ground sense for the AIN+ input; the LTC1412

will hold and convert the difference voltage between AIN+

and AIN–. The leads to AIN+ (Pin 1) and AIN– (Pin 2) should

be kept as short as possible. In applications where this is

not possible, the AIN+ and AIN– traces should be run side

by side to equalize coupling.

Supply Bypassing

High quality, low series resistance ceramic, 10

µF bypass

capacitors should be used at the VDD and REFCOMP pins.

Surface mount ceramic capacitors such as Murata

GRM235Y5V106Z016 provide excellent bypassing in a

small board space. Alternatively 10

µF tantalum capacitors

in parallel with 0.1

µF ceramic capacitors can be used.

Bypass capacitors must be located as close to the pins as

possible. The traces connecting the pins and the bypass

capacitors must be kept short and should be made as wide

as possible.

Example Layout

Figures 13a, 13b, 13c and 13d show the schematic and

layout of an evaluation board. The layout demonstrates the

proper use of decoupling capacitors and ground plane

with a two layer printed circuit board.

Figure 12. Power Supply Grounding Practice

LTC1412

AIN

ANALOG INPUT

AIN

–

VREF

REFCOMP

AGND

1412 F11b

100

Ω

50k

24k

–5V

24k

50k

47k

µF

Figure 11b. Offset and Full-Scale Adjust Circuit

– 0.61mV (i.e., – 0.5LSB) at AIN+ and adjust the offset at

the AIN– input until the output code flickers between 0000

0000 0000 and 1111 1111 1111. For full-scale adjust-

ment, an input voltage of 2.49817V (FS/2 – 1.5LSBs) is

applied to AIN+ and R2 is adjusted until the output code

flickers between 0111 1111 1110 and 0111 1111 1111.

Board Layout and Bypassing

To obtain the best performance from the LTC1412, a

printed circuit board with ground plane is required. Layout

for the printed circuit board should ensure that digital and

analog signal lines are separated as much as possible. In

particular, care should be taken not to run any digital line

alongside an analog signal line.

An analog ground plane separate from the logic system

ground should be established under and around the ADC.

Pin 5 (AGND), Pins 22 and 14 (DGND) and Pin 19 (OGND)

and all other analog grounds should be connected to this

single analog ground point. The REFCOMP bypass capaci-

tor and the DVDD bypass capacitor should also be con-

nected to this analog ground plane, see Figure 12. All

analog circuitry grounds should be terminated to this

analog ground plane. The ground return from the ground

1412 F12

AIN

AGND

REFCOMP

VSS

AVDD

LTC1412

DIGITAL

SYSTEM

ANALOG

INPUT

CIRCUITRY

OVDD DVDD

21, 27

OGND

DGND

14, 22

POWER

SUPPLY

GROUND

0.1

µF

AIN

–

0.1

µF

0.1

µF

ANALOG GROUND PLANE

–

µF

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