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LTC1484CS8 Datasheet(PDF) 3 Page - Linear Technology |
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LTC1484CS8 Datasheet(HTML) 3 Page - Linear Technology |
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3 / 16 page  3 LTC1484 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ∆VTH Receiver Input Hysteresis VCM = 0V, DE = 0 q ±30 mV VOH Receiver Output High Voltage IOUT = – 4mA, (VA – VB) = 200mV q 3.5 V VOL Receiver Output Low Voltage IOUT = 4mA, (VA – VB) = – 200mV q 0.4 V IOZR Three-State (High Impedance) Output Current VCC = Max, 0.4V ≤ VOUT ≤ 2.4V, q ±1 µA at Receiver DE = 0 RIN Receiver Input Resistance –7V ≤ VCM ≤ 12V q 12 22 k Ω ICC Supply Current No Load, Output Enabled (DE = VCC) q 600 900 µA No Load, Output Disabled (DE = 0) q 400 700 µA ISHDN Supply Current in Shutdown Mode DE = 0, RE = VCC, DI = 0 q 120 µA IOSD1 Driver Short-Circuit Current, VOUT = High (Note 4) – 7V ≤ VOUT ≤ 10V 35 250 mA IOSD2 Driver Short-Circuit Current, VOUT = Low (Note 4) – 7V ≤ VOUT ≤ 10V 35 250 mA IOSR Receiver Short-Circuit Current 0V ≤ VOUT ≤ VCC q 785 mA The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V ±5% (Notes 2 and 3) unless otherwise noted. ELECTRICAL CHARACTERISTICS SWITCHING CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tPLH Driver Input to Output RDIFF = 54Ω, CL1 = CL2 = 100pF q 10 28.5 60 ns (Figures 4, 6) tPHL Driver Input to Output RDIFF = 54Ω, CL1 = CL2 = 100pF q 10 31 60 ns (Figures 4, 6) tSKEW Driver Output to Output RDIFF = 54Ω, CL1 = CL2 = 100pF q 2.5 10 ns (Figures 4, 6) tr, tf Driver Rise or Fall Time RDIFF = 54Ω, CL1 = CL2 = 100pF q 315 40 ns (Figures 4, 6) tZH Driver Enable to Output High CL = 100pF (Figures 5, 7) S2 Closed q 40 70 ns tZL Driver Enable to Output Low CL = 100pF (Figures 5, 7) S1 Closed q 40 100 ns tLZ Driver Disable Time from Low CL = 15pF (Figures 5, 7) S1 Closed q 40 70 ns tHZ Driver Disable Time from High CL = 15pF (Figures 5, 7) S2 Closed q 40 70 ns tPLH Receiver Input to Output RDIFF = 54Ω, CL1 = CL2 = 100pF, q 30 160 200 ns (Figures 4, 8) tPHL Receiver Input to Output RDIFF = 54Ω, CL1 = CL2 = 100pF, q 30 140 200 ns (Figures 4, 8) tSKD |tPLH – tPHL| Differential Receiver Skew RDIFF = 54Ω, CL1 = CL2 = 100pF, 20 ns (Figures 4, 8) tZL Receiver Enable to Output Low CRL = 15pF (Figures 3, 9) S1 Closed q 20 50 ns tZH Receiver Enable to Output High CRL = 15pF (Figures 3, 9) S2 Closed q 20 50 ns tLZ Receiver Disable from Low CRL = 15pF (Figures 3, 9) S1 Closed q 20 50 ns tHZ Receiver Disable from High CRL = 15pF (Figures 3, 9) S2 Closed q 20 50 ns tDZR Driver Enable to Receiver Valid RDIFF = 54Ω, CL1 = CL2 = 100pF q 1600 3000 ns (Figures 4, 10) fMAX Maximum Data Rate (Note 5) q 4 5 Mbps tSHDN Time to Shutdown (Note 6) DE = 0, RE ↑ q 50 300 600 ns The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. |
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