LTC1531CSW datasheet(4/16 Pages) LINER

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LTC1531

PIN FUNCTIONS

VCC (Pin 1): Powered Side Power Supply.

SHDN (Pin 2): Active Low Chip Shutdown. A low signal

causes the circuitry to power down. DATA logic output

level will be reset to zero during power-down.

ZCNEG (Pin 3): Zero-Cross Comparator Negative Input.

ZCPOS (Pin 4): Zero-Cross Comparator Positive Input.

VPW (Pin 11): Isolated Power Supply. Connect to an

external storage capacitor.

CMPOUT (Pin 12): Isolated Latched Comparator Data.

CMPOUT is active when VREG is on. The CMPOUT output

can be used on the isolated side for hysteresis (see

applications). The output will contain the result of the

previous comparison. When VREG is low, the CMPOUT pin

is Hi-Z.

VREG (Pin 13): Isolated 2.5V Regulated Output. Pulsed on

for 100

µs with a maximum load current of 5mA. VREG also

supplies power to the CMPOUT output (Pin 12).

ISOGND (Pin 14): Isolated Side Power Ground.

V4 (Pin 15): Comparator Negative Input. The comparator

inputs are summed together with the comparison output

equal to (V1 + V2)/2 > (V3 + V4)/2 or equivalently (V1 – V3)

> (V4 – V2).

V3 (Pin 16): Comparator Negative Input.

V2 (Pin 17): Comparator Positive Input.

V1 (Pin 18): Comparator Positive Input.

VALID (Pin 25): Pulsed Output. Indicates when valid data

was received from the comparator. May be used to clock

DATA to external circuitry.

DATA (Pin 26): Latched Comparator Result. DATA holds

the value of the last valid comparison result. DATA changes

only when a valid comparison was received from the

isolated side.

ZCDATA (Pin 27): A 24

µs to 30µs Pulsed Output. The

pulse occurs when the DATA output is high and the zero-

cross comparator inputs (ZCPLS-ZCNEG) cross zero volts

differential. Typically the zero-cross input signal is an RC

phase shifted AC sine wave. This output is a TTL level pulse

that can be used for firing an external triac.

GND (Pin 28): Power Supply Low Impedance Ground

Connection.

IVREG (mA)

1531 F03

VCC = 4.5V

TA = 25°C

VCC = 5.5V

VCC = 5V

Figure 3. Average tSAMPLE vs IVREG

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 4. VRMS vs Frequency

FREQUENCY (Hz)

4500V

BREAKDOWN

LIMIT

100k

100M

1531 F04

10k

10M

2500VRMS

450mV

4.5V

45V

450V

SLEW RATE = (

π)(f)(VP-P)

= (1.11)(f)(VRMS)

= VRMS

50V/

µs

(1.11)(f)

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