TSM4N70CPROG datasheet(2/9 Pages) TSC

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TSM4N70

Taiwan Semiconductor

Document Number: DS_P0000167

Version: A15

ELECTRICAL SPECIFICATIONS (T

A = 25°C unless otherwise noted)

PARAMETER

CONDITIONS

SYMBOL

MIN

TYP

MAX

UNIT

Static

(Note 4)

Drain-Source Breakdown Voltage

VGS = 0V, ID = 250µA

BVDSS

700

Gate Threshold Voltage

VDS = VGS, ID = 250µA

VGS(TH)

Gate Body Leakage

VGS = ±30V, VDS = 0V

IGSS

±100

Zero Gate Voltage Drain Current

VDS = 700V, VGS = 0V

IDSS

µA

Drain-Source On-State Resistance

VGS = 10V, ID = 2A

RDS(on)

2.5

3.3

Dynamic

(Note 5)

Total Gate Charge

VDS = 480V, ID = 4A,

VGS = 10V

Gate-Source Charge

Qgs

Gate-Drain Charge

Qgd

Input Capacitance

VDS = 25V, VGS = 0V,

f = 1.0MHz

Ciss

595

Output Capacitance

Coss

Reverse Transfer Capacitance

Crss

Switching

(Note 6)

Turn-On Delay Time

VDD = 300V,

RGEN = 25Ω,

ID = 4A, VGS = 10V,

td(on)

Turn-On Rise Time

Turn-Off Delay Time

td(off)

40.5

Turn-Off Fall Time

Source-Drain Diode

(Note 4)

Forward On Voltage

IS = 2.5A, VGS = 0V

VSD

1.5

Notes:

Current limited by package

Pulse width limited by the maximum junction temperature

L = 7mH, IAS = 3.5A, VDD = 50V, RG = 25Ω, Starting TJ = 25

Pulse test: PW

≤ 300µs, duty cycle ≤ 2%

For DESIGN AID ONLY, not subject to production testing.

Switching time is essentially independent of operating temperature.

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