LP6253 datasheet(7/11 Pages) POWER

7 / 11 page

Preliminary Datasheet

LP6253

LP6253 –00

Version 1.0

Sep.-2013

Email: marketing@lowpowersemi.com

www.lowpowersemi.com

Page 7 of 11

Operation Information

The LP6253 uses a synchronous 1.4MHz/800KHz

fixed frequency, current-mode regulation architecture

to regulate the output voltage. The LP6253 measures

the output voltage through an external resistive

voltage divider and compares that to the internal

0.5V/0.8V reference to generate the error voltage to

the inductor current to regulate the output voltage.

The

use

current-mode

regulation

improves

transient response and control loop stability. The

peak current of the NMOS switch is also sensed to

limit the maximum current flowing through the

switch and the inductor. The typical peak current

limit

set

7A(LP6253SPF).

internal

temperature sensor prevents the device from getting

overheated in case of excessive power dissipation.

The device integrates an N-channel and a P-channel

MOSFET transistor to realize a synchronous rectifier.

Because the commonly used discrete Schottky

rectifier is replaced with a low RDS(ON) PMOS switch,

the power conversion efficiency reaches 96%. To

avoid ground shift due to the high currents in the

NMOS switch, two separate ground pins are used.

The reference for all control functions is the GND

pin. The source of the NMOS switch is connected to

PGND. Both grounds must be connected on the PCB

at only one point close to the GND pin. A special

circuit is applied to disconnect the load from the

input

during

shutdown

the

converter.

conventional

synchronous

rectifier

circuits,

the

backgate diode of the high-side PMOS is forward

biased in shutdown and allows current flowing from

the battery to the output. This device however uses a

special circuit which takes the cathode of the

backgate

diode

the

high-side

PMOS

and

disconnects it from the source when the regulator is

not enabled (EN = low). The benefit of this feature

for the system design engineer is that the battery is

not depleted during shutdown of the converter. No

additional components have to be added to the design

to make sure that the battery is disconnected from the

output of the converter.

Device Enable

The device is put into operation when EN is set high.

It is put into a shutdown mode when EN is set to

GND. In shutdown mode, the regulator

stops

switching, all internal control circuitry including the

low-battery comparator is switched off, and the load

is isolated from the input (as described in the

Synchronous Rectifier Section). This also means that

the output voltage can drop below the input voltage

during shutdown. During start-up of the converter,

the duty cycle and the peak current are limited in

order to avoid high peak currents drawn from the

battery.

Undervoltage Lockout

An under voltage lockout function prevents device

start-up if the supply voltage on VBAT is lower than

approximately

1.5V(LP6253QVF)

2.3V(LP6253SPF). When in operation and the

battery is being discharged, the device automatically

enters the shutdown mode if the voltage on VBAT

drops below approximately 1.5 V. This undervoltage

lockout function is implemented in order to prevent

the malfunctioning of the converter.

Softstart(for LP6253QVF)

When the device enables the internal start-up cycle

starts with the first step, the precharge phase. During

precharge, the rectifying switch is turned on until the

output capacitor is charged to a value close to the

input voltage. The rectifying switch current is limited

in that phase. This also limits the output current

under short-circuit conditions at the output. After

charging the output capacitor to the input voltage the

device starts switching. Until the output voltage is

reached, the boost switch current limit is set to 40%

of its nominal value to avoid high peak currents at the

battery during startup. When the output voltage is

reached, the regulator takes control and the switch

current limit is set back to 100%.

Power Save Mode(for LP6253QVF)

The MODE pin can be used to select different

operation modes. To enable power save, MODE must

be set low. Power save mode is used to improve

efficiency at light load. In power save mode the

converter only operates when the output voltage trips

below a set threshold voltage. It ramps up the output

voltage with one or several pulses and goes again

into power save mode once the output voltage

exceeds the set threshold voltage. This power save

mode can be disabled by setting the MODE to

VBAT.

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