MAX1202BCSLASHD datasheet(3/24 Pages) MAXIM

3 / 24 page

5V, 8-Channel, Serial, 12-Bit ADCs

with 3V Digital Interface

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ELECTRICAL CHARACTERISTICS (continued)

(VDD = +5V ±5%, VL = 2.7V to 3.6V; VSS = 0V or -5V ±5%; fSCLK = 2.0MHz, external clock (50% duty cycle); 15 clocks/conversion

cycle (133ksps); MAX1202—4.7µF capacitor at REF pin; MAX1203—external reference, VREF = 4.096V applied to REF pin;

TA = TMIN to TMAX; unless otherwise noted.)

MAX1202AC

TA = +25°C

External clock, 2MHz, 12 clocks/conversion

(Note 6)

On/off leakage current, VCH_ = ±5V

Bipolar, VSS = -5V

Unipolar, VSS = 0V

Used for data transfer only

Internal compensation mode (Note 6)

Internal clock

MAX1202AE

External compensation mode

External compensation mode, 4.7µF

±30

±60

CONDITIONS

ppm/°C

±30

±50

VREF Temperature Coefficient

REF Short-Circuit Current

4.076

4.096

4.116

REF Output Voltage

Input Capacitance

µA

±0.01

±1

Multiplexer Leakage Current

±VREF /2

4.7

VREF

Input Voltage Range, Single-

Ended and Differential (Note 7)

2.0

±30

0.1

0.4

MAX1202B

µF

MHz

0.1

2.0

External Clock Frequency Range

MHz

1.7

Internal Clock Frequency

0.01

0mA to 0.5mA output load

2.5

Load Regulation (Note 8)

Aperture Delay

µs

1.5

tACQ

Track/Hold Acquisition Time

µs

5.5

tCONV

Conversion Time (Note 5)

Internal compensation mode

µF

Capacitive Bypass at REF

Capacitive Bypass at REFADJ

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

±1.5

REFADJ Adjustment Range

2.50

VDD +

50mV

Input Voltage Range

µA

200

350

Input Current

Ω

Input Resistance

SHDN = 0V

µA

1.5

REF Input Current in Shutdown

VDD -

50mV

REFADJ Buffer Disable Threshold

<50

Aperture Jitter

CONVERSION RATE

INTERNAL REFERENCE (MAX1202 only, reference-buffer enabled)

ANALOG INPUT

EXTERNAL REFERENCE AT REF (Reference buffer disabled, VREF = 4.096V)

MAX1202BC/D Datasheet(PDF) 3 Page - Maxim Integrated Products

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