Digitally Controlled

Fuel-Gauge Interface

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13

OCO and ODO Gate Drivers

OCO and ODO are open-drain N-channel MOSFET out-

puts that drive the external P-channel MOSFET gates.

Connect pull-up resistors in the 500k

Ω to 1MΩ range

from OCO and ODO to BATT to reduce current draw

when OCO and ODO are driven low. For additional pro-

tection of OCO and ODO from voltage spikes coupled

through the MOSFET gate capacitance, place 10k

Ω

resistors (R9 and R10) from OCO and ODO to the

respective MOSFET gates (Figure 8). To protect the

battery pack and load during power-up, OCO and

ODO are forced into a high-Z state during the power-

on-reset timeout period. Table 4 shows the truth tables

defining the OCO and ODO output states with respect

to the overcurrent comparators and the MAX1660’s

configuration bits.

INT Output

The MAX1660’s INT output drives an optional third wire

that interrupts the host whenever an alert condition

occurs. The MAX1660’s host-interrupt procedure is

compatible with the SMBus SMBALERT# signal, but it is

equally useful as a simple host-interrupt output.

By default, an interrupt is triggered (INT is pulled low) any

time an overcurrent condition occurs (see the

Overcurrent

Detection section). The MAX1660 may also be configured

to generate an interrupt whenever a digital compare

equality occurs and/or when a change in the current-flow

direction is detected (see the

Digital Compare Function

and

Direction-Change Detection Function sections).

Once triggered, INT stays low until the interrupt is

cleared. An interrupt is cleared when one of three con-

ditions is true: a 1 is written into the configuration

word’s CLRINT bit, the MAX1660 acknowledges the

SMBus Alert Response Address (ARA), or a power-on

reset occurs. The MAX1660 acknowledges the ARA

with the 0 x 8F byte.

INT is an open-drain output; connect a 100k

Ω pull-up

resistor between INT and VL.

Alert Response Address (0001100)

The Alert Response address provides quick fault identi-

fication for single slave devices that lack the complex,

expensive logic needed to be a BusMaster.

When a slave device generates an interrupt, the host

(BusMaster) interrogates the bus slave devices via a

special receive-byte operation that includes the Alert

Response address. The data returned by this read-byte

operation is the address of the interrupting slave

device. The MAX1660 when interrupted, will respond

with 0x8F.

RST Output

RST is an open-drain, active-low power-on reset output

provided for the MAX1660’s host controller and other

external circuitry. RST drives low on power-up whenev-

er the MAX1660 enters hard-shutdown mode, or when-

1.7V). In hard-shutdown mode, RST goes low and

remains low as long as the VL regulator provides suffi-

cient gate drive to the RST output switch (typically until

VL falls to 1V), after which RST drifts slightly upward.

On power-up or when exiting hard-shutdown mode,

(typically 2.9V). Although RST offers a reliable power-

on reset function, it does not detect brownout condi-

brownout detection, refer to Maxim’s complete line of

precision microprocessor supervisory products.

Connect a 100k

Ω pull-up resistor between RST and VL.

Leave RST unconnected if the power-on reset function

is not used.

Internal Regulator and Reference

The 3.3V VL internal linear regulator powers the

MAX1660 control circuitry, logic, and reference, and

can supply up to 5mA to power external loads, such as

a microcontroller or other circuitry. Bypass VL to GND

with a 0.33µF capacitor.

The 2.00V precision reference (REF) is accurate to

±2%, making it useful as a system reference. REF can

supply up to 200µA to external circuitry. Bypass REF to

GND with a 10nF capacitor.

Shutdown Modes

Hard Shutdown

Driving SHDN low puts the MAX1660 into hard-shut-

down mode and forces the power-on reset state. In

hard-shutdown mode, the VL regulator and the refer-

ence turn off, reducing supply current to 1µA (max). To

protect the battery pack and load during the power-on-

reset timeout period, the OCO and ODO outputs are

forced into their high-Z states. SHDN is a logic-level

Soft Shutdown

Drive the MAX1660 into soft-shutdown mode by setting

the configuration word’s SHDNSTATUS bit. All interrupts

clear in soft-shutdown mode. In this mode, only the VL

regulator and the SMBus interface remain active, reduc-

ing the supply current to just 15µA.

To prevent current from flowing undetected while the

MAX1660 remains in soft-shutdown mode, ensure that

the command to enter soft-shutdown mode contains a

*

Patent pending