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MAX2671 Datasheet(PDF) 13 Page - Maxim Integrated Products |
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MAX2671 Datasheet(HTML) 13 Page - Maxim Integrated Products |
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13 / 16 page ![]() 400MHz to 2.5GHz Upconverter Mixers ______________________________________________________________________________________ 13 _______________Detailed Description The MAX2660/MAX2661/MAX2663/MAX2671/MAX2673 are 2.5GHz double-balanced upconverter mixers designed to provide optimum linearity performance for a specified supply current. These upconverter mixers use single-ended RF, LO, and IF port connections, except for the MAX2673, which uses a differential IF port. An on-chip bias cell provides a low-power shut- down feature. See the Selector Guide for device fea- tures and comparison. __________Applications Information Local-Oscillator (LO) Input The LO input is a single-ended broadband port with a return loss of better than 8dB from 600MHz to 2.5GHz. The LO signal is mixed with the input IF signal, and the resulting upconverted output appears on the RFOUT pin. AC-couple the LO pin with a capacitor having less than 3 Ω reactance at the LO frequency. The MAX2671/MAX2673 include an internal LO buffer and require an LO signal ranging from -10dBm to +5dBm, while the MAX2660/MAX2661/MAX2663 require an LO signal ranging from -5dBm to +2dBm. IF Input The MAX2660/MAX2661/MAX2663/MAX2671 have a single-ended IF input port, while the MAX2673 has a differential IF input port for high-performance interface- to-differential IF filters. AC-couple the IF pin(s) with a capacitor. The typical IF input frequency range is 40MHz to 500MHz. For further information, see the IF Port Impedance vs. IF Frequency graph in the Typical Operating Characteristics. RF Output The RF output frequency range extends from 400MHz to 2.5GHz. RFOUT is a high-impedance, open-collector output that requires an external inductor to VCC for proper biasing. For optimum performance, implement an impedance-matching network. The configuration and values for the matching network depend on the fre- quency, performance, and desired output impedance. For assistance in choosing components for optimal per- formance, see Table 1 as well as the RF Output Impedance vs. RF Frequency graph in the Typical Operating Characteristics. Power Supply and S SH HD DN N Bypassing Proper attention to supply bypassing is essential for a high-frequency RF circuit. Bypass VCC with a 10µF capacitor in parallel with an RF capacitor (Table 2). Use separate vias to the ground plane for each of the bypass capacitors and minimize trace length to reduce inductance. Use separate vias to the ground plane for each ground pin. Use low-inductance ground connec- tions. Decouple SHDN with a 100pF capacitor to ground to minimize noise on the internal bias cell. Use a series resistor (typically 100 Ω) to reduce coupling of high-fre- quency signals into the SHDN pin. ______________________Layout Issues A well-designed PC board is an essential part of an RF circuit. For best performance, pay attention to power- supply issues as well as to the layout of the RFOUT matching network. Power-Supply Layout To minimize coupling between different sections of the IC, the ideal power-supply layout is a star configuration with a large decoupling capacitor at a central VCC node. The VCC traces branch out from this central node, each going to a separate VCC node in the PC board. At the end of each trace is a bypass capacitor that has low ESR at the RF frequency of operation. This arrangement provides local decoupling at each VCC pin. At high frequencies, any signal leaking out of one supply pin sees a relatively high impedance (formed by the VCC trace inductance) to the central VCC node, and an even higher impedance to any other supply pin, as well as a low impedance to ground through the bypass capacitor. Impedance-Matching Network Layout The RFOUT matching network is very sensitive to lay- out-related parasitics. To minimize parasitic induc- tance, keep all traces short and place components as close as possible to the chip. To minimize parasitic capacitance, use cutouts in the ground plane (and any other plane) below the matching network components. |
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