IR3842AM datasheet(17/34 Pages) IRF

17 / 34 page

Rev 13.0

PD-97510

IR3842AMPbF

Minimum on time Considerations

The minimum ON time is the shortest amount of

time for which the Control FET may be reliably

turned on, and this depends on the internal

timing delays. For the IR3842A, the typical

minimum on-time is specified as 50 ns.

Any design or application using the IR3842A

must ensure operation with a pulse width that is

higher than this minimum on-time and preferably

higher than 100 ns. This is necessary for the

circuit to operate without jitter and pulse-

skipping, which can cause high inductor current

ripple and high output voltage ripple.

In any application that uses the IR3842A, the

following condition must be satisfied:

The minimum output voltage is limited by the

reference voltage and hence V

out(min) = 0.7 V.

Therefore, for V

out(min) = 0.7 V,

Therefore, at the maximum recommended input

voltage 21V and minimum output voltage, the

converter should be designed at a switching

frequency that does not exceed 330 kHz.

Conversely, for operation at the maximum

recommended operating frequency 1.2 MHz and

minimum output voltage, any voltage above

5.83V may not be stepped down reliably without

pulse-skipping.

V/s

100

0.7

(min)

≤

∴

≤

∴

out

Maximum Duty Ratio Considerations

A fixed off-time of 200 ns maximum is specified

for the IR3842A. This provides an upper limit on

the operating duty ratio at any given switching

frequency. It is clear that, higher the switching

frequency, the lower is the maximum duty ratio at

which the IR3842A can operate. To allow a

margin of 50 ns, the maximum operating duty

ratio in any application using the IR3842A should

still accommodate about 250 ns off-time. Fig 10.

shows a plot of the maximum duty ratio v/s the

switching frequency, with 250 ns off-time.

out

Vin ×

(min)

out

≤

∴

≤

∴

≤

Fig. 10. Maximum duty cycle v/s switching

frequency.

300

400

500

600

700

800

900

1000

1100

1200

Switching Frequency (kHz)

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