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MAX3785 Datasheet(PDF) 2 Page - Maxim Integrated Products

Part # MAX3785
Description  6.25Gbps, 1.8V PC Board Equalizer
PDF  10 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX3785 Datasheet(HTML) 2 Page - Maxim Integrated Products

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6.25Gbps, 1.8V PC Board Equalizer
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage, VCC to GND.................................-0.5V to +6.0V
Continuous Output Current (OUT+, OUT-) .......-25mA to +25mA
Input Voltage (IN+, IN-) ..............................-0.5V to (VCC + 0.5V)
Operating Ambient Temperature Range ............... 0°C to +85°C
Storage Ambient Temperature Range...............-55°C to +150°C
Continuous Power Dissipation (TA = +70°C)
6-Pin TDFN (derate 24.4mW above +70°C)..................1.95W
ELECTRICAL CHARACTERISTICS
(Typical values measured at VCC = 1.8V and TA= +25
°C. Specifications guaranteed over specified operating conditions.)
(See Operating Conditions table.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Current
35
55
mA
Input Swing (IN)
Measured differentially at data source before
encountering loss (Point A in Figure 1) (Note 1)
400
1600
mVP-P
Input Common-Mode Voltage Range
(Note 1)
VCC -
(INMAX/4)
VCC -
(INMIN/4)
V
Input Return Loss
100MHz to 3.2GHz, power off
15
dB
Differential Input Resistance
IN+ and IN-
85
100
115
Ω
Output Swing
Measured differentially at OUT+ and OUT- with 50
Ω
±1% load at each side
450
800
mVP-P
Output Resistance
OUT+ or OUT-
42
50
58
Ω
Output Return Loss
100MHz to 3.2GHz, IN+ = high
14
dB
Output Transition Time (tr, tf)
20% to 80% (Note 2)
30
40
55
ps
2.5Gbps, 3.2Gbps, 5.0Gbps; 0in to 30in FR4
400mVP-P
≤ IN ≤ 1600mVP-P
0.10
0.15
2.5Gbps, 3.2Gbps; 40in FR4
400mVP-P
≤ IN ≤ 1600mVP-P
0.15
0.20
6.25Gbps; 0in to 30in FR4
600mVP-P
≤ IN ≤ 1600mVP-P
0.15
0.25
Residual Deterministic Jitter
(Notes 1, 3, 4)
6.25Gbps; 0in to 30in FR4
IN = 400mVP-P
0.20
0.30
UI
Output Random Jitter
(Notes 1, 2)
0.75
1.0
psRMS
Low-Frequency Cutoff Frequency
50
kHz
Latency
200
ps
Maximum Bit Rate
(Note 1)
6.25
6.4
Gbps
Minimum Bit Rate
(Note 1)
1.0
2.5
Gbps
Note 1: Guaranteed by design and characterization.
Note 2: Using input pattern 0000011111 at 6.25Gbps.
Note 3: Difference in deterministic jitter between data source and equalizer output, evaluated at 2.5Gbps, 3.2Gbps, 5Gbps, and
6.25Gbps. Pattern used: PRBS (27), ninety-six 0s, 1, 0, 1, 0, PRBS (27), ninety-six 1s, 0, 1, 0, 1.
Note 4: Signal is applied differentially at input to a 6-mil wide, loosely coupled stripline. Deterministic jitter at the output of the
transmission line is from media-induced loss, not from clock source modulation (see Figure 1).



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