Low-Voltage, Bidirectional

RF/Video Switch

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9

Single-Supply Operation Above 5V

The MAX4529 is designed for operation from single

+5V or dual ±5V supplies. As V+ is increased above

5V, the logic-level threshold voltage increases and the

supply current increases. In addition, if the logic levels

are not driven rail-to-rail, the analog signal pins, COM

and NC, can conduct a significant DC current (up to

1mA) to the supply pins. This current can add an

unwanted DC bias to the signal. Therefore, when oper-

ating V+ above 5V, always drive the IN pin rail-to-rail.

Power Off

When power to the MAX4529 is off (i.e., V+ = 0V and V-

= 0V), the Absolute Maximum Ratings still apply. This

means that neither logic-level inputs on IN nor signals

on COM or NC can exceed ±0.3V. Voltages beyond

±0.3V cause the internal ESD-protection diodes to con-

duct, and the parts can be damaged if excessive cur-

rent flows.

Grounding

DC Ground Considerations

Satisfactory high-frequency operation requires that

careful consideration be given to grounding. For most

applications, a ground plane is strongly recom-

mended, and GND should be connected to it with

solid copper.

In systems that have separate digital and analog (sig-

nal) grounds, connect these switch GND pins to analog

ground. Preserving a good signal ground is much more

important than preserving a digital ground. Ground cur-

rent is only a few nanoamps.

The logic-level input, IN, has voltage thresholds deter-

mined by V+ and GND. (V- does not influence the

logic-level threshold.) With +5V and 0V applied to V+

and GND, the threshold is about 1.6V, ensuring com-

patibility with TTL- and CMOS-logic drivers.

The GND pin can be connected to separate voltage

potentials if the logic-level input is not a normal logic

signal. (The GND voltage cannot exceed (V+ - 2V) or V-.)

Elevating GND reduces off isolation. Note, however,

that IN can be driven more negative than GND, as far

as V-. GND does not have to be removed from 0V when

IN is driven from bipolar sources, but the voltage on IN

should never exceed V-. GND should be separated

from 0V only if the logic-level threshold has to be

changed.

If the GND pin is not connected to 0V, it should be

bypassed to the ground plane with a surface-mount

10nF capacitor to maintain good RF grounding. DC

current in the IN and GND pins is less than 1nA, but

increases with switching frequency.

AC Ground and Bypassing

A ground plane is mandatory for satisfactory high-

frequency operation. (Prototyping using hand wiring

or wire-wrap boards is strongly discouraged.) Connect

any 0V GND pins to the ground plane with solid cop-

per. (The GND pin extends the high-frequency ground

through the package wire-frame, into the silicon itself,

thus improving isolation.) The ground plane should be

solid metal underneath the device, without interrup-

tions. There should be no traces under the device itself.

For DIP packages, this applies to both sides of a two-

sided board. Failure to observe this will have a minimal

effect on the “on” characteristics of the switch at high

frequencies, but it will degrade the off isolation and

crosstalk.

V+ and V- pins should be bypassed to the ground

plane with surface-mount 10nF capacitors. For DIP

packages, they should be mounted as close as possi-

ble to the pins on the same side of the board as the

device. Do not use feedthroughs or vias for bypass

capacitors. For surface-mount packages, the pins are

so close to each other that the bypass capacitors

should be mounted on the opposite side of the board

from the device. In this case, use short feedthroughs or

vias, directly under the V+ and V- pins. Any GND pin

not connected to 0V should be similarly bypassed. If V-

is 0V, connect it directly to the ground plane with solid

copper. Keep all leads short.

Signal Routing

Keep all signal leads as short as possible. Separate all

signal leads from each other and other traces with the

ground plane on both sides of the board. Where possi-

ble, use coaxial cable instead of printed circuit board

traces.

Board Layout

IC sockets degrade high-frequency performance and

should not be used if signal bandwidth exceeds 5MHz.

Surface-mount parts, having shorter internal lead

frames, provide the best high-frequency performance.

Keep all bypass capacitors close to the device, and

separate all signal leads with ground planes. Such

grounds tend to be wedge-shaped as they get closer to

the device. Use vias to connect the ground planes on

each side of the board, and place the vias in the apex of

the wedge-shaped grounds that separate signal leads.

Logic-level signal lead placement is not critical.