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MAX5019ESA Datasheet(PDF) 8 Page - Maxim Integrated Products |
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MAX5019ESA Datasheet(HTML) 8 Page - Maxim Integrated Products |
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8 / 14 page ![]() vantage to this is that the MOSFET voltage rating must be higher and that slope compensation must be provid- ed to stabilize the inner current loop. The MAX5019 provides internal slope compensation. Internal Regulators The internal regulators of the MAX5019/MAX5020 enable initial startup without a lossy startup resistor and regulate the voltage at the output of a tertiary (bias) winding to provide power for the IC. At startup V+ is regulated down to VCC to provide bias for the device. The VDD regulator then regulates from the output of the tertiary winding to VCC. This architecture allows the ter- tiary winding to only have a small filter capacitor at its output thus eliminating the additional cost of a filter inductor. When designing the tertiary winding calculate the num- ber of turns so the minimum reflected voltage is always higher than 12.7V. The maximum reflected voltage must be less than 36V. To reduce power dissipation the high-voltage regulator is disabled when the VDD voltage reaches 12.7V. This greatly reduces power dissipation and improves effi- ciency. If VCC falls below the undervoltage lockout threshold (VCC = 6.6V), the low-voltage regulator is dis- abled, and soft-start is reinitiated. In undervoltage lock- out the MOSFET driver output (NDRV) is held low. If the input voltage range is between 13V and 36V, V+ and VDD may be connected to the line voltage provid- ed that the maximum power dissipation is not exceed- ed. This eliminates the need for a tertiary winding. Undervoltage Lockout (UVLO), Soft-Start, and Shutdown The soft-start feature of the MAX5019/MAX5020 allows the load voltage to ramp up in a controlled manner, thus eliminating output voltage overshoot. While the part is in UVLO, the capacitor connected to the SS_SHDN pin is discharged. Upon coming out of UVLO an internal current source starts charging the capacitor to initiate the soft-start cycle. Use the follow- ing equation to calculate total soft-start time: where CSS is the soft-start capacitor as shown in Figure 2. Operation begins when VSS_SHDN ramps above 0.6V. When soft-start has completed, VSS_SHDN is regulated t ms C startup ss =× 045 . nF Current-Mode PWM Controllers with Integrated Startup Circuit 8 _______________________________________________________________________________________ NDRV VOUT 5V/10A COUT 3 ✕ 560 µF CDD 4.7 µF CCC 10 µF CSS 0.1 µF 0.1 µF VDD RSENSE 100m Ω R1 2k Ω R2 2k Ω 100 Ω 20 Ω M1 IRF640N VIN (36V TO 72V) NT NR NP NS CIN VCC CS GND 3 ✕ 0.47 µF L1 4.7 µH FB MAX5020 V+ 1nF 6 CMHD2003 1N4148 14 SBL204OCT (OPTIONAL) CFB SS_SHDN 14 5 Figure 2. Forward Converter |
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