Quad, Serial 8-Bit DACs

with Rail-to-Rail Outputs

14

______________________________________________________________________________________

If multiple devices share a common DIN line, Figure 7's

configuration provides simultaneous update by strob-

ing

LDAC low. CS1, CS2, CS3... are driven separately,

thus controlling which data are written to devices 1, 2, 3....

Analog Section

DAC Operation

The MAX509/MAX510 contain four matched voltage-

output DACs. The DACs are inverted R-2R ladder net-

works that convert 8-bit digital words into equivalent

analog output voltages in proportion to the applied ref-

erence voltages. Each DAC in the MAX509 has a sepa-

rate reference input, while the two reference inputs in

the MAX510 each share a pair of DACs. The two refer-

ence inputs permit different full-scale output voltage

ranges for each pair of DACs. A simplified diagram of

one of the four DACs is shown in Figure 8.

Reference Input

The MAX509/MAX510 can be used for multiplying

applications. The reference accepts both DC and AC

signals. The voltage at each REF input sets the full-

scale output voltage for its respective DAC(s). If the ref-

erence voltage is positive, both the MAX509 and

MAX510 can be operated from a single supply. If dual

supplies are used, the reference input can vary from

impedance at REF is code dependent, with the lowest

value (16k

Ω for the MAX509 and 8kΩ for the MAX510)

occurring when the input code is 55 hex or 0101 0101.

The maximum value, practically infinity, occurs when

the input code is 00 hex. Since the REF input imped-

ance is code dependent, the DAC's reference sources

must have a low output impedance (no more than 32

Ω

for the MAX509 and 16

Ω for the MAX510) to maintain

output linearity. The REF input capacitance is also code

dependent: 15pF typical for the MAX509 and 30pF

typical for the MAX510.

The output voltage for any DAC can be represented by

a digitally programmable voltage source as:

VOUT = (NB x VREF) / 256

where NB is the numerical value of the DAC's binary

input code.

Output Buffer Amplifiers

All MAX509/MAX510 voltage outputs are internally

buffered by precision unity-gain followers that slew at

With a 0V to +4V (or +4V to 0V) output transition, the

amplifier outputs will settle to 1/2LSB in typically 6µs

when loaded with 10k

Ω in parallel with 100pF.

The buffer amplifiers are stable with any combination of

resistive loads

≥ 2kΩ and capacitive loads ≤ 300pF.

__________Applications Information

Power Supply and

Reference Operating Ranges

The MAX509/MAX510 are fully specified to operate with

mance is guaranteed for both single- and dual-supply

operation. The zero-code output error is less than 14mV

when operating from a single +5V supply.

time is also acceptable. In either case, the voltage

up or at any other time. If proper power sequencing is

not possible, connect an external Schottky diode

Absolute Maximum Ratings. Do not apply signals to

the digital inputs before the device is fully powered up.

Power-Supply Bypassing

and Ground Management

together in a "star" ground at the chip. This ground

should then return to the highest quality ground avail-

Careful PC board layout minimizes crosstalk among

DAC outputs, reference inputs, and digital inputs.

Figures 9 and 10 show suggested circuit board layouts

to minimize crosstalk.

2R

R

RR

2R

2R

2R

2R

2R

D0

D5

D6

D7

REF_

AGND

SHOWN FOR ALL 1 ON DAC

OUT_

Figure 8. DAC Simplified Circuit Diagram